Principal AMS Verification Engineer

Job Title

Principal AMS Verification Engineer

Role Summary

Join the ATE Group to lead system-level verification for multi-die custom chiplet products combining BiCMOS SiGe and CMOS processes. The role focuses on verification of mixed-signal and digital circuits — including high-speed drivers/receivers, DACs, SPI/JTAG/SerDes interfaces, calibration routines, and digital controls — and on correlating simulation and lab results with evaluation engineers.

The position requires ownership of verification planning and execution, development of testbenches and regressions across Verilog and SPICE simulators, and collaboration with designers, product engineers, and test teams.

Experience Level

Senior — principal-level role. Posting indicates a preference for 6+ years of relevant experience.

Responsibilities

Primary responsibilities include planning and executing system and block verification for advanced multi-die products and coordinating verification activities across teams.

• Own system-level verification plan and execution for multi-die chiplet products.
• Develop testbench environments and implement directed, constrained-random, and coverage-driven verification methodologies.
• Create functional coverage metrics and ensure environments support verification, design, product, and test workflows.
• Define block-level modeling and verification strategies from requirements and architecture.
• Specify and run RTL, gate, and mixed-signal co-simulation regressions; track progress against the verification plan.
• Collaborate with designers and product engineers to reach functional coverage goals and debug issues.
• Work with evaluation engineers to compare simulation and silicon lab results and iterate on verification and test plans.
• Prepare and present verification plans and final review documentation.

Requirements

Must-have technical skills and capabilities for performing the role; education details are listed separately below.

Must-have:

• Strong knowledge of SystemVerilog, UVM, and object-oriented verification methodologies.
• Experience with Verilog simulators and SPICE-based analog simulation tools.
• Familiarity with analog CAD tools such as Cadence Virtuoso.
• Scripting experience (Python, TCL, Perl, Bash) for testbench automation and flow development.
• Ability to debug at circuit and system levels and to collaborate across teams.
• Strong written and verbal communication and presentation skills.

Nice-to-have:

• Prior experience with high-speed SerDes, SPI/JTAG, DACs, and calibration routines in mixed-signal systems.
• Experience with multi-die or System-in-Package (chiplet) verification.

Education Requirements

Degree requirements mention BSEE as a minimum and MSEE as preferred. Fields referenced include Electrical Engineering (or related technical fields). The posting also indicates a preference for 6+ years of relevant experience.

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.