Pre-Silicon Verification Engineer
Intel CorporationJob Title
Pre-Silicon Verification Engineer
Role Summary
The Pre-Silicon Verification Engineer will develop and run verification environments and tests to ensure functional correctness of clock generator IPs (e.g., PLL, FLL) and related mixed-signal validation activities. The role sits in Intel's Central Engineering Group and works across RTL, analog, and architecture teams to close pre-silicon issues and improve verification methodology.
Experience Level
Mid-level - typically 3+ years of relevant verification experience.
Responsibilities
Key day-to-day responsibilities include:
- Design and implement testbenches and verification environments using SystemVerilog and UVM.
- Create and execute directed and constrained-random tests to validate IP against specifications.
- Perform functional verification of clock generator IPs (PLL/FLL) and related RTL features.
- Maintain and improve verification infrastructure and methodology across IP generations.
- Debug and root-cause pre-silicon issues within the verification environment and coordinate fixes.
- Lead mixed-signal validation tasks including AMS simulations and schematic-level debugging.
- Document test plans, results, and participate in technical reviews with design teams.
- Collaborate cross-functionally with architects, RTL developers, and analog teams on feature verification.
Requirements
Must-have technical skills and experience:
- Practical experience with Design Verification methodologies and tools, including UVM and SystemVerilog (minimum ~2+ years working with these technologies).
- Familiarity with industry-standard EDA simulation and verification tools.
- Scripting experience for verification flows (e.g., Python, Perl).
- Hands-on debugging experience in pre-silicon environments and strong root-cause analysis skills.
- Ability to work collaboratively across RTL, analog, and architecture teams and to document test plans and results clearly.
Nice-to-have / preferred:
- Advanced expertise in SystemVerilog UVM coding and debugging.
- Familiarity with PLL/FLL, SoC clocking architectures, or related RTL development.
- Experience with mixed-signal (AMS) verification and schematic-level debugging.
Education Requirements
Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field with relevant experience: Bachelor's +4 years, Master's +3 years, or PhD +1 year as listed in the position qualifications (the posting also allows equivalent relevant experience in lieu of the specified degree experience combination).
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
