PMIC Analog Intern
RenesasJob Title
PMIC Analog Intern
Role Summary
Summer 2027 internship on the Memory Interface Division team to support development of the next-generation DDR PMIC. The intern will research PMIC control architectures, perform multi-level simulation, and implement circuits in Cadence with support from design and application engineers.
Placement available in San Jose, San Diego, or Plano. Internship dates: May 24 – August 13, 2027.
Experience Level
Entry-level internship (Summer 2027).
Responsibilities
Key tasks the intern will perform:
- Research PMIC control architectures suitable for next-generation DDR PMICs.
- Perform behavior-level and transistor-level simulations.
- Design and build circuits in Cadence; iterate based on simulation results.
- Collaborate with design engineers (DE) and application engineers (AE) to validate approaches.
- Document findings and present results to the team.
Requirements
Must-have technical skills and attributes:
- Solid background in power electronics and analog circuit design.
- Familiarity with behavior-level simulation tools such as SIMPLIS.
- Experience with transistor-level design and Cadence tool flow.
- Self-driven research capability and ability to work independently with mentorship.
- Availability for the full internship period (May 24–August 13, 2027).
Education Requirements
Current Master's or PhD student (preferred). Candidate must not have graduated before September 2027. Preferred fields: Power Electronics, Analog Design, Electrical Engineering, or related technical fields.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
