PIC Test Lead

Job Title

PIC Test Lead

Role Summary

Lead wafer-level optical and electrical test strategy for photonic integrated circuits (PICs) across product development and volume manufacturing. Own test architecture, first-silicon bring-up, yield learning, and transfer of test flows to foundries and manufacturing partners.

Work closely with design, process integration, and fabrication teams to enable scalable, high-throughput wafer probe solutions and to reduce test time while maintaining release quality.

Experience Level

Senior — typically 10+ years in PIC test engineering, wafer-level probing, or photonics manufacturing test (per job qualifications).

Responsibilities

Accountable for defining and executing wafer-level test strategy and for enabling factory-scale test solutions.

• Define and own wafer-level PIC test roadmap across product lines and technology platforms.
• Architect scalable, high-throughput optical and electrical wafer probe solutions, balancing alignment accuracy, probe stability, and throughput.
• Establish release criteria, guard-banding, and wafer test coverage models aligned to product requirements.
• Lead first-silicon bring-up: define test content, set limits, and develop characterization flows.
• Drive rapid yield-learning loops with design, process integration, and fabrication teams; enable fast debug during node transitions and platform ramps.
• Influence DFT and PDK structures to embed manufacturable test hooks (on-chip monitors, loopbacks, test waveguides, calibration structures).
• Own wafer-level yield, parametric distributions, and spatial analytics; lead root-cause investigations for coupling variation, lithography bias, and process drift.
• Establish golden wafer/die methodologies, qualify probe infrastructure with foundries/OSATs, and transfer test flows into HVM.
• Provide technical leadership during yield crises, mentor junior engineers, and standardize test practices.

Requirements

Must-have technical experience and demonstrated ownership; preferred items listed separately.

• Must-have: 10+ years in PIC test engineering, wafer-level probing, or photonics manufacturing test with proven ownership from R&D through HVM.
• Expertise in wafer-level optical probing and probe card qualification.
• Experience with yield learning, spatial analysis, and test time optimization.
• Track record engaging foundries and transferring test flows to manufacturing.
• Demonstrated leadership in driving test strategy, debugging yield issues, and mentoring engineers.
• Nice-to-have: Experience with high-speed optical and electrical testing of PICs or optical transceivers; prior influence on PIC DFT and PDK collaboration; background in high-volume semiconductor or photonics manufacturing; experience scaling test infrastructure across nodes and product families.

Education Requirements

Not specified.

About the Company

Company: Xscape Photonics

Headquarters: Santa Clara, California, United States

Developer of integrated photonics solutions and instrumentation, specializing in photonic circuits, control systems, and test methodologies for optical communication and sensing applications. Works on device integration, control algorithms, and validation of photonic hardware and firmware.