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Physical Design Senior Engineer

Qualcomm
September 07, 2026
Full-time
On-site
Chennai, Tamil Nadu, India
Physical Design Jobs, Level - Senior

Job Title

Physical Design Senior Engineer

Role Summary

Performs end-to-end physical implementation for SoC subsystems and PPA-critical cores, including floorplanning, place-and-route, CTS, timing closure, power optimization and physical verification. Works within the Hardware Engineering group and collaborates with design, DFT and PNR teams to meet performance, power and area targets in advanced nodes.

Experience Level

Senior. Posting indicates approximately 3–6 years of experience in physical design/implementation; alternative degree-based minima are listed in Education Requirements.

Responsibilities

Primary responsibilities include subsystem physical implementation, timing and power convergence, and cross-team issue resolution.

  • Floorplanning, placement and routing for subsystem and core IP.
  • Clock tree synthesis (CTS) and clocking architecture implementation.
  • Timing closure and timing convergence for high-frequency datapaths.
  • Power delivery network (PDN) design and power optimization.
  • Physical verification (DRC/LVS) and support for formal verification where required.
  • Use and tuning of implementation tools (Synopsys ICC2, Cadence Innovus) and STA tools (PTSI, Tempus).
  • Create and maintain automation scripts (Tcl, Perl) to support flows.
  • Collaborate with design, DFT and PNR teams to validate constraints, resolve implementation issues, and achieve PPA targets.

Requirements

Essential technical skills and experience.

  • 3–6 years of hands-on experience in physical design/implementation of PPA-critical cores or subsystems.
  • Proven experience with place-and-route flows and timing closure on advanced technology nodes.
  • Strong knowledge of STA, timing convergence techniques, and clocking strategies for high-frequency datapaths.
  • Experience with Synopsys ICC2 and/or Cadence Innovus; familiarity with PTSI/Tempus for timing analysis.
  • Experience with physical verification (DRC/LVS), PDN analysis, CTS and power optimization techniques.
  • Proficient scripting skills for automation (Tcl, Perl); familiarity with AWK is useful.
  • Strong problem-solving skills and effective communication; ability to work cross-functionally.

Nice-to-have: experience with compiler-related tools or other ASIC CAD tooling.

Education Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related technical field with 2+ years of hardware engineering experience; OR Master's degree in those fields with 1+ year of hardware engineering experience; OR a PhD in those fields. Fields cited: Computer Science, Electrical/Electronics Engineering, Engineering or related technical disciplines.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-06