Physical Design Power Optimization and Modeling Engineer
Join the Networking Silicon Power engineering team to drive power optimization and modeling across block and top-level physical design for high-speed communication chips. Work on RTL-to-GDS flows to reduce power, meet timing, and address power/noise challenges in a production ASIC environment.
Entry-level / Early-career. Target candidates with approximately 1+ years of relevant physical-design or back-end power optimization experience.
Primary responsibilities focus on physical-design power work across the chip delivery flow.
Must-have skills and relevant experience; advantages listed as preferred.
B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or equivalent practical experience.
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
