Physical Design Lead

Job Title

Physical Design Lead

Role Summary

Lead the physical design implementation team in Bangalore to deliver complex SoC tiles from RTL to GDS. Responsible for place-and-route, timing closure, physical verification, signoff, IP integration and full-chip convergence while coordinating with architects, IP teams, CAD and EDA vendors.

Drive methodology improvements and PPA optimization; provide technical direction and mentorship to the engineering team.

Experience Level

Senior — the role expects an experienced physical design professional; the posting specifies a minimum of 15 years of industry experience in the physical design domain.

Responsibilities

Key responsibilities include technical leadership of implementation activities and ensuring successful tape-outs.

• Lead the physical design team for implementation and convergence of highly complex tiles and blocks.
• Manage RTL-to-GDS flow: floorplanning, place-and-route, timing closure, physical verification, and signoff.
• Ensure timing convergence at tile and full-chip levels and coordinate full-chip integration.
• Collaborate with SoC architects, design leads, IP teams, PD/STA engineers, CAD and EDA vendors.
• Drive methodology development and continuous improvements to achieve better power, performance and area (PPA).
• Provide technical direction, guidance, and support to engineering staff; track project milestones and convergence status.

Requirements

Must-have technical skills and experience; concise list of expectations for candidates.

• Minimum 15 years of industry experience in physical design with hands-on RTL-to-GDS, STA, physical verification, timing signoff and tapeout experience.
• Proven experience managing more than four tape-outs.
• Block-level implementation experience (floorplanning, P&R, timing closure, physical verification).
• Familiarity with industry EDA tools such as Fusion Compiler, ICC2, PrimeTime, RedHawk, PTPX (or equivalent).
• Experience with signoff techniques: formal equivalence, IR/EM checks, low-power checks, STA and full-chip signoff flows.
• Proficient scripting skills (Perl, TCL, Shell, Python) and working knowledge of Verilog/VHDL RTL.
• Strong communication, project management and team leadership skills; able to coordinate cross-functional teams.
• Nice-to-have: experience with advanced process nodes, PPA optimization techniques, and prior collaboration with EDA vendors on methodology.

Education Requirements

B.Tech, M.Tech, MS or Ph.D. in Computer Engineering, Electronics Engineering or Electrical Engineering are specified.

About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.