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Physical Design Engineer - STA

Tenstorrent
August 27, 2026
Full-time
Remote friendly (Austin, TX, United States; Fort Collins, CO, United States; Santa Clara, CA, United States)
Worldwide
$100,000 - $500,000 USD yearly
Physical Design Jobs, Level - Senior

Job Title

Physical Design Engineer - STA

Role Summary

Drive static timing analysis (STA) and timing closure for high-performance silicon designs, focusing on RISC-V CPUs and AI SoCs. Work within the silicon/physical design team to ensure chips meet performance targets across corners and modes.

Collaborate closely with logic, DFT, and physical design engineers to debug constraints, optimize timing paths, create ECOs, and automate closure workflows.

Experience Level

Senior β€” typically 7+ years of industry experience with tapeout experience; candidates at other levels may be considered and assessed during interviews.

Responsibilities

Primary responsibilities for this role include:

  • Lead STA and timing closure efforts for complex, high-performance designs.
  • Develop and debug SDC constraints and timing scripts; create and validate ECOs.
  • Analyze timing failures across corners, modes, and PVT; apply optimization strategies.
  • Perform noise, crosstalk, and OCV analysis to ensure timing robustness.
  • Collaborate with logic, DFT, and physical design teams to resolve cross-discipline issues.
  • Build and maintain automation and flows using scripting and tool integrations.
  • Support tapeout readiness activities and post-layout signoff tasks.

Requirements

Must-have technical skills and experience:

  • 7+ years of industry experience with a proven record of successful tapeouts.
  • Deep knowledge of STA tools and methodologies, including noise, crosstalk, and OCV analysis.
  • Proficiency in writing and debugging SDC constraints and producing ECOs.
  • Strong scripting skills in Python, Perl, and TCL for automation and flow development.
  • Familiarity with SPICE modeling and worst-case corner analysis.
  • Ability to work across RTL, DFT, and physical design teams to drive closure.
  • Must be eligible to access U.S. export-controlled technology (citizenship/permanent residency or ability to obtain prior license approval) β€” employment may be contingent on this.

Nice-to-have:

  • Experience with high-performance RISC-V CPUs or AI SoCs.
  • Prior experience improving timing closure flows and building scalable automation frameworks.

Education Requirements

Not specified.


About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.

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Date Posted: 2026-08-26