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Physical Design Engineer, Senior Lead

Qualcomm
October 2, 2026
Full-time
On-site
Hyderabad, Telangana, India
Physical Design Jobs, Level - Senior

Job Title

Physical Design Engineer, Senior Lead

Role Summary

Senior physical design engineer responsible for end-to-end ASIC physical implementation and signoff activities. Works on floorplanning, place-and-route, timing closure, power grid and low-power implementation, and debugging of physical issues.

Works within a global hardware engineering team and collaborates with RTL designers, verification, and signoff teams to deliver production-quality tapeouts.

Experience Level

Senior level. The posting targets experienced candidates; typical guidance indicates 4–10 years of physical design experience and the minimum-qualification matrix specifies degree-dependent experience (see Education Requirements).

Responsibilities

Primary responsibilities include ownership of physical design tasks from netlist to GDS2, implementation of low-power techniques, and ensuring signoff closure.

  • Lead floorplanning, placement, clock-tree synthesis (CTS), routing and signoff preparation.
  • Drive timing closure (STA) and resolve congestion and CTS issues.
  • Implement voltage islands and low-power strategies; perform low-power checks.
  • Prepare and execute signoff flows (PV, PDN, FV, CLP, scan/DRC checks) for tapeout.
  • Develop and improve place-and-route methodologies and automation flows.
  • Collaborate with cross-functional and global teams; communicate status and issues of owned tasks.

Requirements

Must-have technical skills and attributes.

  • Thorough knowledge of ASIC place-and-route flows and methodology.
  • Hands-on experience with full physical design flow from netlist to GDS2, including power-grid (PDN) and signoff checks.
  • Experience debugging congestion and clock-tree (CTS) issues and achieving STA closure.
  • Practical experience with P&R tools and flows, e.g. Cadence Innovus or Synopsys Fusion Compiler.
  • Familiarity with signoff methodologies and tools (power verification, PDN analysis, static timing, functional verification signoff checks).
  • Proficient in scripting for automation (TCL, Perl, Python).
  • Ability to improve methodologies, work independently, and operate effectively in a global team; clear verbal and written communication skills.

Education Requirements

One of the following is required: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering or related field with 3+ years of hardware engineering experience; OR Master's degree in the same fields with 2+ years of hardware engineering experience; OR PhD in the same fields with 1+ year of hardware engineering experience.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-10-01