Physical Design Engineer, Lead
QualcommJob Title
Physical Design Engineer, Lead
Role Summary
Lead physical design and IP development for high-performance, low-power SoC/ASIC blocks. Collaborate with cross-functional teams to define architecture, implement designs, and ensure timing, power, and quality targets are met.
Experience Level
Senior. Typical candidates have multiple years of ASIC experience; preferred seniority is 5+ years. Minimum experience expectations vary by degree: Bachelor's +3 years, Master's +2 years, PhD +1 year.
Responsibilities
Core responsibilities include architecture, implementation, verification, and documentation of ASIC IP and blocks.
- Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP/SoC blocks.
- Create architectures, circuit specifications, logic designs, and system simulations from system requirements.
- Collaborate with software and hardware architecture teams to develop and execute implementation strategies.
- Evaluate and drive the full implementation flow: synthesis, place-and-route, timing, power analysis, and verification; or custom circuit/layout flow.
- Utilize EDA flows and tools (e.g., RTL-to-GDS flow, Virtuoso) to enable block and SoC delivery.
- Write and review technical documentation for EDA/IP/ASIC projects.
- Provide supervision and guidance to team members; influence decisions beyond the immediate team.
Requirements
Must-have technical skills and experience; concise list of core requirements and desirable capabilities follows.
- Must-have: Practical experience in ASIC design, verification, validation, or integration.
- Hands-on experience with architecture and design tools and methodologies.
- Proficiency with scripting and programming for automation and flows.
- Knowledge of design verification methods and verification flows.
- Experience with RTL-to-GDS flows, place-and-route, timing and power analysis, or custom layout tools.
- Strong technical writing and verbal communication; ability to document designs and influence stakeholders.
- Ability to work independently, plan tasks, solve problems, and mentor others.
- Nice-to-have: Experience interacting with senior leadership; analog/mixed-signal exposure; experience with Virtuoso and advanced EDA toolchains; 5+ years of ASIC design experience.
Education Requirements
Bachelor's degree in Science, Engineering, or related field (typically with ~3+ years relevant experience), or Master's degree in Science, Engineering, or related field (typically with ~2+ years), or PhD in Science, Engineering, or related field (typically with ~1+ year). Preferred fields: Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
