Physical Design Engineer Intern (MS) - Summer 2027

Job Title

Physical Design Engineer Intern (MS) - Summer 2027

Role Summary

Internship supporting physical design tasks for ASIC and processor projects across Marvell’s data center, AI, storage, and networking product domains. Work with a physical design team and cross-functional partners to help meet performance, power, and area targets for active designs.

Experience Level

Entry-level internship for current Master's students. No specific years of professional experience required; role is intended for candidates enrolled in a graduate program.

Responsibilities

The intern will assist with physical design implementation, verification, and debugging under the guidance of senior engineers.

• Perform synthesis, floorplanning, place-and-route, clock insertion, timing analysis, and timing closure on logic blocks using industry-standard EDA tools.
• Develop and maintain scripts (Python, TCL, Perl, Shell) to automate design and verification tasks.
• Use static timing analysis tools to locate and resolve timing violations and convergence issues.
• Debug and analyze design problems using CAD tools and recommend fixes.
• Collaborate with RTL, synthesis, and other design teams to resolve congestion, timing bottlenecks, and integration issues.

Requirements

Core technical skills and tool experience required for productive contribution during the internship.

• Proficiency in scripting languages: Python, TCL, Perl, and Shell.
• Experience working in Unix/Linux environments.
• Familiarity with EDA tools such as Synopsys (PrimeTime), Cadence (Tempus), and Mentor.
• Practical exposure to timing analysis, place-and-route flows, or RTL-to-GDSII implementation.
• Strong analytical, problem-solving, and communication skills.

Education Requirements

Currently enrolled in a Master’s degree program in Electrical Engineering, Computer Engineering, or a related field with an expected graduation between Fall 2027 and Summer 2028. Relevant coursework includes VLSI, digital logic, circuit design, computer architecture, RTL synthesis, Verilog/SystemVerilog, place-and-route, static timing analysis, digital systems, or microelectronics. Note: additional compensation may be available for intern PhD candidates.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.