Physical Design Engineer

Job Title

Physical Design Engineer

Role Summary

Join Qualcomm's SoC and ASIC Design organization to execute physical implementation for high-performance, AI, mobile, automotive, and data-center semiconductor projects. Work spans floorplanning, place-and-route, CTS, timing closure, low-power implementation, verification, and automation.

Experience Level

Mid-level - guidance: 2–10+ years of industry or equivalent academic/project experience in physical design.

Responsibilities

Contribute across the full physical design flow and collaborate with architecture, RTL, verification, and methodology teams to achieve tape-out.

• Execute physical design flow from synthesized netlist through tape-out (floorplan, placement, CTS, routing).
• Perform floorplanning, partitioning, power planning, and IR-drop analysis.
• Perform placement, clock tree synthesis, routing, timing optimization, and timing closure for MMMC scenarios.
• Analyze and resolve timing violations, signal integrity, crosstalk, and physical-design rule issues.
• Perform RC extraction, physical verification, and formal verification activities as needed for sign-off.
• Implement ECOs and support design convergence through sign-off.
• Develop automation and productivity tools using scripting and software techniques.

Requirements

Must-have items first, followed by commonly preferred skills.

• Must-have: 2–10+ years of hands-on experience in ASIC/SoC physical design and implementation.
• Must-have: Practical experience with placement, CTS, routing, timing optimization, and timing closure.
• Must-have: Strong problem-solving and ASIC development/debugging skills; experience with ECOs and design convergence.
• Must-have: Scripting/automation experience (Python, Perl, Tcl, Shell) and familiarity with Linux/Unix environments.
• Nice-to-have: Experience with Cadence Innovus, Synopsys Fusion Compiler, and Synopsys PrimeTime SI.
• Nice-to-have: Background in low-power implementation, power-domain design, signal integrity/noise analysis, and MMMC sign-off flows.
• Nice-to-have: Experience with physical verification sign-off methodologies, formal verification tools, and DFT-aware physical implementation.
• Nice-to-have: C/C++ programming or additional software tooling experience for automation and methodology development.

Education Requirements

Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field is specified; minimum stated: Bachelor's degree. The posting allows equivalent academic or project experience in lieu of industry experience.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.