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Physical Design Engineer

Qualcomm
September 09, 2026
Full-time
On-site
San Diego, California, United States
$98,500 - $147,700 USD yearly
Physical Design Jobs, Level - Mid-Career

Job Title

Physical Design Engineer

Role Summary

Design and implement physical IP blocks and SoC features for high-performance, low-power ASIC products. Work on architecture, circuit and logic design, implementation flow (synthesis, place and route, timing and power), and verification across cross-functional teams.

Position sits in the ASIC/Physical Design team and requires collaboration with hardware, software, and verification teams to deliver production-quality silicon.

Experience Level

Mid-level. Typical candidates have 2+ years of ASIC design/verification/validation/integration experience; preferred candidates have 3+ years and experience with architecture and design tools.

Responsibilities

Primary duties include block- and SoC-level physical design, verification, and documentation.

  • Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP and block/SoC designs.
  • Create architectures, circuit specifications, logic designs, and system simulations from system requirements.
  • Work across teams to develop and execute implementation strategies that meet system and customer requirements.
  • Evaluate and drive process flow from high-level design through synthesis, place-and-route, timing closure, power analysis, and verification.
  • Use EDA and custom-layout flows (e.g., RTL-to-GDS flows, Virtuoso) to implement designs.
  • Produce detailed technical documentation for EDA/IP/ASIC projects.
  • Operate independently with minimal supervision and influence decisions beyond the immediate team.

Requirements

Must-have technical skills and experience; preferred items noted separately.

  • ASIC design, verification, validation, or integration experience (practical years noted in Education Requirements).
  • Experience with RTL-to-GDS flows and/or custom circuit design/layout flows (Virtuoso or equivalent).
  • Familiarity with synthesis, place-and-route, timing closure, and power analysis.
  • Experience with design verification methods and EDA toolchains.
  • Scripting and programming skills for automation and tool integration.
  • Strong written and verbal communication; ability to write technical documentation.
  • Ability to collaborate across software, hardware, and verification teams.

Nice-to-have:

  • Experience with architecture and design tools (2+ years preferred).
  • Additional experience in circuit design, automation, or C++ development.

Education Requirements

Minimum: Bachelor's degree in Science, Engineering, or related field plus 2+ years of ASIC design/verification/validation/integration experience; OR Master's degree in Science, Engineering, or related field plus 1+ year of relevant experience; OR PhD in Science, Engineering, or related field. Preferred fields: Electrical/Electronic Engineering, Computer Engineering, or Computer Science.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-09