Physical Design Engineer
BroadcomJob Title
Physical Design Engineer (New College Grad)
Role Summary
Join Broadcom’s ASIC Products Division Physical Design team to implement block-level physical design flows for high-performance networking, AI/ML accelerators, and custom cloud ASICs. The team focuses on floorplanning, placement and routing, timing closure, verification, and automation for advanced nodes and chiplet integration.
This role provides hands-on experience executing P&R flows, static timing analysis, physical verification checks, power integrity analysis, and scripting to improve design flow efficiency.
Experience Level
Entry-level - New college graduate. See Education Requirements for degree and graduation timing expectations.
Responsibilities
Work on block-level physical implementation tasks under senior engineer guidance.
- Run placement and route (P&R) flows using industry EDA tools for block-level designs.
- Perform static timing analysis (STA), debug timing paths, and implement ECOs for timing closure.
- Execute physical verification checks (DRC, LVS, ERC, Antenna) and resolve signoff issues.
- Analyze IR drop and electromigration (EM) to ensure power-grid integrity.
- Develop and maintain automation and scripts (TCL, Python, Ruby, Bash) to increase flow productivity.
- Collaborate with RTL, synthesis, power, and signoff teams to meet design and signoff targets.
Requirements
Must-have technical skills and eligibility; preferred items listed separately.
- Solid understanding of digital CMOS logic, standard cell libraries, and semiconductor fundamentals.
- Familiarity with static timing analysis concepts, clocking, and setup/hold timing.
- Hands-on coursework, lab experience, or academic projects using EDA tools (Cadence, Synopsys, Siemens, or equivalent).
- Proficient in scripting (TCL, Python, Ruby, or Bash) and able to write automation for flows.
- Legal authorization to work in the United States.
Preferred:
- Prior internship or research experience in ASIC physical design, synthesis, or physical verification.
- Basic knowledge of DFT, low-power intent (UPF/CPF), and FinFET technologies.
- Strong problem-solving, debugging, and analytical skills.
Education Requirements
Bachelor's degree in Electrical Engineering or Computer Engineering (with up to 2 years of additional experience) or a Master’s degree in Electrical Engineering or Computer Engineering. The posting targets new college graduates and specifies graduation timing (Master’s candidates: graduation within the past 12 months). Relevant coursework/lab experience with EDA tools is expected.
About the Company
Company: Broadcom
Headquarters: Irvine, California, United States
Broadcom is a global technology leader that designs, develops, and supplies a wide range of semiconductor and infrastructure software solutions. The company is known for its innovations in wireless and broadband communications, enabling a connected world.
