Physical Design CPU Methodology Engineer

Job Title

Physical Design CPU Methodology Engineer

Role Summary

Define and drive CPU physical-design methodology, automation strategy, and signoff infrastructure to achieve predictable RTL-to-GDS execution and strong PPA for high-performance CPU cores on advanced process nodes.

Provide organization-level technical leadership and partner with architecture, RTL, circuit, CAD, program, data, and EDA vendor teams to scale methodology across projects and teams. Role is remote, based in the United States.

Experience Level

Senior - typically 10+ years of ASIC/SoC/CPU physical-design experience focused on high-performance or complex digital designs.

Responsibilities

Key responsibilities include:

• Define and own end-to-end CPU physical-design methodology: synthesis, floorplanning, power planning, PnR, CTS, extraction, STA, SI, EM/IR, and physical verification.
• Develop and maintain automation, CAD flows, checkers, dashboards, and signoff criteria to improve predictability, turnaround time, and PPA.
• Lead synthesis and place-and-route of CPU partitions and pilot new program flows for CPU designs.
• Integrate extraction, STA, SI, EM/IR, and physical verification into robust signoff processes.
• Explore and pilot AI/ML techniques for hotspot prediction, congestion forecasting, timing-risk classification, ECO prioritization, and IR-drop screening.
• Establish quality metrics, debug workflows, and data collection/validation for production signoff integration.
• Collaborate with cross-functional teams and EDA vendors to enable advanced nodes and productize AI/ML across physical design.
• Mentor engineers and drive standards and best practices across geographically distributed teams.

Requirements

Must-have and preferred qualifications:

• Must-have: 10+ years of ASIC/SoC/CPU physical-design experience with demonstrated RTL-to-GDS implementation and signoff expertise (timing closure, power optimization, SI, EM/IR, extraction, physical verification).
• Must-have: Proven experience building or owning physical-design methodology, automation, or CAD flows and strong scripting skills (Tcl, Python, Perl or similar).
• Must-have: Technical leadership ability to influence across teams, mentor engineers, and drive standards.
• Must-have: Experience with advanced process nodes and collaboration with EDA vendors and foundries.
• Must-have: Eligibility to access U.S. export-controlled technology; employment may be contingent on citizenship, permanent residency, or prior license approval under U.S. export regulations.
• Nice-to-have: Experience applying AI/ML to physical design workflows, data infrastructure for model deployment, or prior work productizing data-driven EDA optimizations.

Education Requirements

Not specified.

About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.