Performance Research Engineer (multiple levels)

Job Title

Performance Research Engineer (staff to principal levels)

Role Summary

Apply research-grade performance analysis and optimization to a novel energy-efficient processor architecture. Work across compiler, architecture, and systems teams to design tools, run simulation experiments, evaluate code generation, and integrate optimizations into production performance libraries.

This is an applied research role focused on hardware/software co-design and building high-performance libraries and tools for resource-constrained devices.

Experience Level

Senior level — staff to principal engineering tiers. Specific years of experience not stated.

Responsibilities

Drive and evaluate performance improvements across software and hardware; design and integrate tools and optimizations into the product stack.

• Research and prototype new optimization techniques for the company’s Fabric dataflow architecture.
• Design and implement tools for AI-assisted optimization and performance analysis.
• Collaborate with architecture and compiler teams to influence ISA, suggest intrinsics, and evaluate code-generation quality.
• Design and run modeling and simulation experiments using the architecture simulator.
• Integrate new techniques and language extensions into performance libraries and applications.
• Perform performance profiling, benchmark design, and comparative hardware analysis.
• Document results and lead cross-team discussions to drive consensus and feature adoption.

Requirements

Key technical skills and experience required; degree requirements are listed separately below.

• Hands-on software development working closely with hardware; exposure to at least two RISC, DSP, or GPU platforms.
• Experience with framework and library design for resource-constrained and real-time environments.
• Experience with CUDA, HIP, or other parallel programming models.
• Proven ability to write, debug, and maintain low-level C/C++ systems code and design clean interfaces.
• Familiarity with low-level programming interfaces such as PTX, LLVM IR, and/or MLIR.
• Experience with hardware simulation environments and running modeling experiments.
• Domain expertise in three or more of: linear algebra, ML, image/video processing, signal/audio processing, SDR, real-time programming, or robotics.
• Background in performance profiling, benchmark design, or comparative hardware analysis.
• Ability to lead projects and work independently; strong collaboration and cross-team influence skills.
• Active use of AI tools to generate, optimize, and debug code.

Nice-to-have:

• Some experience with compiler development.
• Experience working with high-performing hardware architecture teams.

Education Requirements

Minimum: Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field. PhD preferred. Equivalent practical work experience accepted.

About the Company

Company: Efficient Computer

Headquarters: Austin, TX, USA

Developer of ultra-low-power general-purpose processors using patented technology that can consume up to 100x less energy than comparable ultra-low-power processors. Their programmable platform supports standard high-level languages and AI/ML frameworks to enable long-lived, battery-powered edge devices and energy-efficient SoCs for IoT and edge AI applications.