Performance Modelling Engineer

Job Title

Performance Modelling Engineer

Role Summary

The Performance Modelling Engineer performs performance analysis and modelling for RISC-V based HPC/AI silicon and systems. The role sits in a multidisciplinary team working across architecture, software, modelling, and validation to deliver component-level performance results used to guide product decisions.

Location: Barcelona office (city centre). Hybrid schedule: 4 days per week in office, 1 day WFH; occasional global remote work allowance noted by employer.

Experience Level

Mid-level. Semidynamics typically seeks around 2–5 years of relevant experience for this role; the range is a guideline and depth of demonstrated skill matters more than strict years.

Responsibilities

Accountable for end-to-end performance modelling and analysis for assigned components; limited day-to-day supervision expected.

• Design, implement, and validate performance instrumentation in simulators and tooling to collect counters and traces (including RISC-V instruction-level data).
• Profile applications and workloads; visualise execution behaviour and correlate software events with hardware counters.
• Build cycle-accurate simulators or analytical models and sign off on results for assigned scope.
• Create repeatable test setups for a range of workloads and ensure high-throughput tracing and analysis methods.
• Deliver assigned modelling work from specification through to sign-off; flag issues early with proposed solutions.
• Act as the primary technical contact for assigned components and collaborate with architecture, software, and adjacent teams to resolve cross-team issues.
• Identify gaps in tooling or methodology and propose concrete improvements; participate actively in technical reviews.

Requirements

Core technical requirements and desirable skills for day-one effectiveness.

Must-have:

• Strong C/C++ and scripting skills (Python, Bash, TCL); experience integrating C/C++ with Python (e.g., pybind11) for simulator tooling.
• Working knowledge of Linux and standard profiling tools (perf, VTune, Nsight Systems, Perfetto, Intel Advisor, FlameGraph).
• Experience profiling applications, visualising execution behaviour, and correlating hardware events with software behaviour.
• Ability to instrument simulators to collect performance counters and to validate results rigorously.
• Strong understanding of single-node xPU architecture, pipeline stages, and memory behaviour; basic familiarity with multi-xPU/multi-node topologies (NVLink, PCIe).
• Experience with cycle-accurate simulators or analytical performance models and with test automation at scale (multicore execution, high throughput tracing).
• Familiarity with the design and testing flow across RTL, software, FPGA, and silicon.

Nice-to-have:

• Experience with RTL design and testing (simulation/synthesis) and trace-based analysis.
• Knowledge of Roofline modelling and profiling of kernels and call stacks.
• Experience with JIT-based, event-based, or cycle-based modelling approaches and RISC-V Vector assembly/optimisation.
• Familiarity with the silicon lifecycle (early design, verification, post-silicon testing).

Education Requirements

No specific mandatory degree is stated. The posting notes that a PhD in a relevant technical field is a plus. Equivalent practical experience and demonstrated depth of technical skill are considered by the employer. (Fields implied: relevant technical disciplines such as computer engineering, computer science, electrical engineering or similar.)

About the Company

Company: Semidynamics

Headquarters: Barcelona, Spain

Semidynamics is a company specializing in infrastructure verification and automation solutions. They focus on optimizing resources and enhancing continuous integration processes in design verification. The team collaborates to maintain regression test infrastructure and develop efficient workflows.