Performance Architect, CPU Cluster

Job Title

Performance Architect, CPU Cluster

Role Summary

Hands-on architecture role focused on cluster-level CPU performance and scalability. You will evaluate how cores, caches, coherent interconnects, memory systems, and chiplets interact and scale, then convert performance analysis into concrete architectural recommendations.

Work closely with CPU architects, RTL designers, compiler and software teams, and system architects to use models and simulation to identify bottlenecks and guide early design decisions. Position is remote and based in North America.

Experience Level

Mid-level (no specific years of experience stated).

Responsibilities

Deliver cluster-level performance analysis, models, and recommendations that shape CPU architecture and system design.

• Analyze and optimize CPU cluster performance: cache hierarchies, interconnects, coherence, memory access behavior, and core-to-core communication.
• Build and use performance models and simulation environments (e.g., Gem5 or equivalent) to evaluate architectural concepts.
• Study real workloads to identify bottlenecks related to cache misses, coherence traffic, memory bandwidth, latency, contention, and scaling.
• Lead tradeoff studies across performance, scalability, bandwidth, latency, power, and implementation complexity.
• Collaborate across CPU, cache, interconnect, memory, software, compiler, and system teams to translate analysis into design decisions.
• Produce clear, data-driven reports and recommendations for architects and implementation teams.

Requirements

Key technical skills and personal attributes required to perform the role.

• Must-have: Strong foundation in CPU microarchitecture and cluster-level performance (cores, caches, interconnects, memory systems, coherence).
• Must-have: Hands-on experience with performance modeling, simulation, and workload analysis (Gem5 or equivalent).
• Must-have: Demonstrated ability to identify and quantify bottlenecks (cache misses, coherence traffic, memory bandwidth/latency, contention) and propose architectural remedies.
• Must-have: Comfortable operating between detailed microarchitecture and system-level reasoning (latency, bandwidth, QoS, utilization, scalability).
• Must-have: Strong analytical skills and ability to synthesize large performance datasets into actionable design recommendations.
• Must-have: Effective communicator and collaborator across architecture, RTL, compiler, software, and system teams.
• Nice-to-have: Prior exposure to RTL, compiler interactions, silicon bring-up, chiplet-based system architecture, or coherence/interconnect design.

Education Requirements

Not specified.

About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.