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PERC Rule Deck Development Engineer

Intel Corporation
August 27, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Test Engineering Jobs, Level - Senior

Job Title

PERC Rule Deck Development Engineer

Role Summary

Develop and validate Programmable Electrical Rule Checker (PERC) rule decks to detect electrical reliability violations and ensure design compliance. Collaborate with PDK teams, foundry partners, device physicists, process integration engineers, and design teams to translate reliability requirements into automated checks and robust verification flows.

Experience Level

Senior-level. Guidance: typically Bachelor’s +10 years, Master’s +8 years, or PhD +2 years; listed as an experienced-hire role.

Responsibilities

Primary responsibilities include rule development, multi-tool verification, debugging, automation, cross-functional collaboration, and documentation.

  • Develop, validate, and maintain complex PERC rule decks to identify electrical reliability violations (ESD paths, current density, voltage stress, floating gates).
  • Integrate and optimize verification flows across multiple EDA environments, ensuring consistent results between Calibre PERC (preferred), Cadence Pegasus, and Synopsys tools.
  • Translate reliability requirements from device and process teams into programmable rules and designer guidelines.
  • Provide expert support to design teams to debug PERC violations and distinguish true reliability risks from tool-induced false positives.
  • Automate execution, reporting, and tracking of reliability checks across design versions using scripting and tooling.
  • Maintain detailed documentation of check-sets and create guidelines for correct-by-construction layouts.

Requirements

Must-have technical skills and practical experience for day-to-day work; preferred items noted.

  • Hands-on experience developing and validating PERC rule decks (Calibre PERC preferred).
  • Knowledge of ESD, latch-up, current density, voltage stress, floating gates, and reliability verification methods.
  • Familiarity with SVRF and TVF; scripting with Python or Tcl. SKILL or Perl experience is a plus.
  • Experience integrating verification flows across Calibre, Cadence Pegasus, and Synopsys tools and ensuring result parity.
  • Strong debugging and problem-solving skills to triage violations and reduce false positives.
  • Experience with automation for execution, reporting, and tracking; comfortable working in Linux environments.
  • Effective collaborator across global, cross-functional teams; strong documentation skills.
  • Nice-to-have: experience with advanced technology nodes and basic AI skills.

Education Requirements

Preferred: Bachelor's degree (10+ years), Master’s degree (8+ years), or PhD (2+ years) in Electrical Engineering, Computer Engineering, Electronics, or a related technical field. Semiconductor industry experience is preferred.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-08-26