PDN Engineer
QualcommJob Title
PDN Engineer
Role Summary
Responsible for power-delivery-network (PDN) sign-off and electromigration/IR (EMIR) analysis for SoC designs, including chip, interposer, and package interactions. Work spans sign-off ownership, flow and methodology development, and cross-functional integration with physical design, package, DFT, test, and EDA vendor teams.
Experience Level
Mid-level - typically candidates with multiple years of semiconductor experience in power-integrity/EMIR and sign-off methodologies (see Education Requirements for degree/experience guidance).
Responsibilities
Key responsibilities include:
- Own full-chip and block-level static/dynamic IR drop and EM sign-off across chip, interposer, and package combinations.
- Perform root-cause debugging for voltage and EM violations and drive fixes with P&R and power-grid teams.
- Provide power estimation and sign-off using tools such as PrimePower and Joules for multiple use cases.
- Define and maintain EM/IR methodologies and flows using industry EDA tools (e.g., Ansys RedHawk-SC, Cadence Voltus).
- Develop and enhance flows for faster convergence and to address evolving sign-off requirements (vector-based and vector-less signoff).
- Support chip-package-system integration and collaborate with silicon, package, interposer, and board/ATE teams on PDN impacts.
- Coordinate with DFT teams to assess the IR/EM impact of test patterns and provide guidelines for test-mode activity toggling.
- Work with EDA vendors to resolve tool issues and track long-term tooling improvements; integrate new methods into flows.
Requirements
Must-have technical skills and domain experience:
- Deep expertise in EMIR sign-off and power-integrity methodologies.
- Proficiency with sign-off tools such as Ansys RedHawk-SC and Cadence Voltus; familiarity with PTPX is a plus.
- Strong scripting skills (Python, TCL) for flow automation and analysis.
- Experience with vector-based and vector-less IR sign-off approaches and convergence strategies.
- Practical knowledge of STA interactions and inter-operation with adjacent domains.
- Experience driving cross-functional fixes with P&R, package, DFT, test, and board teams.
- Ability to work with EDA vendors to triage and resolve tool/flow issues.
Education Requirements
Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, VLSI, or a related engineering/electronics discipline. Qualcomm lists degree-plus-experience options: Bachelor's +6 years, Master's +5 years, or PhD +4 years in hardware engineering or related work; equivalent practical experience may be acceptable where it meets the same experience expectations.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
