PCIe SoC Application Engineer (Sr Staff)

Job Title

PCIe SoC Application Engineer (Sr Staff)

Role Summary

Provide technical leadership and hands-on support for customers integrating Synopsys Interface IP (PCIe and high-speed SerDes) into ASIC/SoC products. Work within a global applications engineering team to resolve integration issues from RTL through silicon bring-up and to feed customer insights back to R&D.

Position can be based in Munich (preferred), Dublin, or Porto and involves occasional onsite customer visits.

Experience Level

Senior — typically 10+ years of industry experience in IP design, ASIC/SoC integration, or customer-facing engineering roles.

Responsibilities

Primary responsibilities focus on enabling successful integration and deployment of Synopsys Interface IP in customer silicon.

• Provide technical guidance and hands-on support during integration of PCIe and high-speed SerDes IP into customer SoCs.
• Conduct integration reviews at key milestones and troubleshoot RTL simulation, synthesis, floorplanning, and timing closure issues.
• Support silicon bring-up, lab characterization, and system-level validation.
• Create application notes, best-practice documentation, and customer training materials.
• Collaborate with cross-functional teams to relay customer feedback and influence product improvements.
• Occasional travel to customer sites for on-site support and system bring-up.

Requirements

Required technical skills and experience for immediate effectiveness in this role.

• 10+ years experience in IP design, ASIC/SoC integration, or customer-facing engineering roles (degree details in Education Requirements).
• Deep understanding of ASIC design flows: simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure.
• Hands-on expertise integrating and validating high-speed SerDes IP for PCIe, USB, and SATA.
• Proficient in RTL and gate-level simulation debugging; familiarity with front-end and timing tools such as Design Compiler, Fusion Compiler, and PrimeTime.
• Practical experience with silicon bring-up and system-level characterization in lab environments.
• Strong communication skills and experience engaging with customers and cross-functional teams.
• Ability to manage multiple priorities and deliver under tight schedules.

Education Requirements

Master's degree preferred/required with 10+ years of industry experience, or equivalent practical experience. The posting also notes exceptional candidates with strong silicon-debug skills and academic backgrounds will be considered.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.