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Packaging Engineer IV

Lattice Semiconductor
April 26, 2026
On-site
Hillsboro, Oregon, United States
Level - Senior

Job Title

Packaging Engineer IV

Role Summary

Senior packaging engineer responsible for semiconductor package design, development, qualification, and transfer to volume manufacturing. The role works within the packaging and product development team and coordinates with design, test, reliability, and manufacturing groups.

Delivers production-ready package solutions that meet electrical, thermal, mechanical, yield, and cost targets through supplier collaboration and cross-functional execution.

Experience Level

Senior — typically requires several years of relevant industry experience; exact years not specified in the source.

Responsibilities

Primary responsibilities include package architecture, development, reliability, and production support.

  • Design and develop semiconductor packages and package variants (e.g., leadframe, QFN, BGA) and evaluate package architectures for manufacturability.
  • Collaborate with IC design, test, and manufacturing to ensure package viability, yield, and cost objectives are met.
  • Develop and execute qualification and reliability test plans; perform failure analysis and implement corrective actions.
  • Manage transfers to assembly/test subcontractors and work with suppliers to resolve production or material issues.
  • Support DFM/DFT reviews, thermal and mechanical assessments, and maintain package documentation and change control.

Requirements

Must-have technical skills and experience; education details are listed separately below.

  • Practical experience in semiconductor package development, assembly processes, or manufacturing support.
  • Experience with package materials, assembly flows, reliability testing, and failure analysis methods.
  • Proven ability to work cross-functionally and with external suppliers; strong problem-solving and communication skills.
  • Experience developing and interpreting qualification and reliability data.

Nice-to-have:

  • Experience with thermal modeling, mechanical stress analysis, or automated test program development.
  • Prior exposure to advanced packaging technologies and high-volume assembly flows.

Education Requirements

Bachelor's degree in Electrical Engineering, Materials Science, Mechanical Engineering, or a related technical field, or equivalent practical experience. Advanced degrees (MS/PhD) or specific packaging certifications are beneficial where applicable.


About the Company

Company: Lattice Semiconductor

Headquarters: Hillsboro, Oregon, United States

Lattice Semiconductor designs low-power, small-form-factor field-programmable gate arrays (FPGAs), system-on-chip solutions, and supporting software/IP for communications, computing, industrial, and consumer electronics.

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Date Posted: 2026-04-26