Packaging Architect

Job Title

Packaging Architect

Role Summary

The Packaging Architect will develop advanced package architectures from concept through production, translating system and chip requirements into packaging specifications that balance electrical, thermal, mechanical performance, cost, and manufacturability.

You will work with substrate, signal integrity, power integrity, product, chip, and system architects, and supply-chain partners to define and validate packaging solutions for data center and HPC products.

Experience Level

Senior — 15+ years in advanced 2D/3D packaging and a decade of deep domain expertise in related areas.

Responsibilities

Key responsibilities include specifying package architectures, evaluating trade-offs, and aligning stakeholders across the product lifecycle.

• Evaluate trade-offs across EIC/PIC layouts, die-to-die interfaces, fiber attachment methods, and packaging technologies.
• Define packaging specifications for electrical, thermal, and mechanical performance that meet budget and schedule targets.
• Perform system-level analysis to determine optimal package architecture across silicon, package, and board levels.
• Partner with supply-chain engineering to specify materials and fabrication/assembly requirements for substrates and vendors.
• Collaborate with Quality & Reliability on qualification criteria and failure resolution.
• Engage product teams and customers in data center/HPC markets to anticipate packaging architecture needs and influence roadmaps.
• Monitor competitive packaging technologies to inform strategic decisions.

Requirements

Must-have technical skills and experience to perform the role.

• 15+ years experience in advanced (2D/3D) packaging technologies with exposure to optical packaging.
• 10+ years of deep expertise in one or more domains: power/signal integrity, thermal-mechanical analysis, or optical packaging.
• Proven ability to perform system-level trade-offs across silicon, package, and board to define packaging solutions for complex products.
• Extensive experience with high-speed interfaces (SERDES, PCIe, die-to-die interconnects) and their implications for substrate selection, interconnect architecture, signal integrity, and thermal management.
• Proven track record delivering packages from concept through production release.
• Proficiency with industry-standard EDA and CAD tools.
• Ability to work with suppliers and define technology/material requirements for substrate fabrication and assembly.
• Must be able to comply with U.S. export control laws and related requirements.

Nice-to-have:

• Technical leadership experience managing complex, multi-disciplinary projects under schedule constraints.
• Strong communication and collaboration skills with cross-functional and external supplier teams.
• Proven ability to operate independently, make decisions with minimal supervision, and manage ambiguity.

Education Requirements

Ph.D. or Master's degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related field (as specified in the posting).

About the Company

Company: Lightmatter

Headquarters: Boston, Massachusetts, USA

Lightmatter develops photonic AI data-center infrastructure and optical chips for extreme-scale AI and HPC. The company invented the Passage 3D‑stacked photonics engine to provide high-bandwidth, low-latency interconnects across large-scale processors and raised $400M in Series D financing at a reported $4.4B valuation.