NPU Staff Design Verification Engineer
QualcommJob Title
NPU Staff Design Verification Engineer
Role Summary
Lead verification engineer for Qualcomm's DSP/NPU IP, responsible for planning and executing verification at IP, subsystem and SoC levels. Works with architecture, implementation, power, post-silicon and back-end teams to ensure correctness and performance for mobile and AI SoC products.
Focus areas include testbench architecture (SystemVerilog/UVM), coverage-driven verification, automation, power-aware verification and gate-level bring-up.
Experience Level
Senior - typically 8+ years in design verification; candidates with 12+ years in processor/ASIC verification are preferred.
Responsibilities
Primary responsibilities include verification planning, environment development, execution, debugging and automation.
- Define verification plans and architect verification environments for DSP/NPU IP.
- Develop and maintain SystemVerilog/UVM testbench architecture and reusable components.
- Implement directed, constrained-random and coverage-driven tests to meet coverage goals.
- Perform simulations, debug IP/subsystem/SoC failures, and manage gate-level simulation and timing-annotated runs.
- Develop automation and verification methodologies to improve efficiency and quality.
- Apply assertions, formal methods, HW-SW co-verification, emulation and simulation acceleration as required.
- Work on power-aware RTL verification and gate-level simulation with UPF interactions.
- Collaborate with cross-functional teams through design, implementation, power and post-silicon stages.
Requirements
Core technical skills and experience required; education requirements are listed under Education Requirements below.
- Extensive ASIC/processor design verification experience with strong digital design and processor architecture knowledge.
- Expertise in SystemVerilog and UVM testbench development and verification methodologies.
- Experience with gate-level simulation, timing-annotated runs and power-aware verification flows.
- Familiarity with commercial simulators (Synopsys, Cadence, Mentor) and verification tools.
- Scripting and automation skills (Python, Perl, Shell, Makefiles) for testbench and flow development.
- Strong debugging and analytical skills; ability to triage failures across RTL, verification environment and silicon.
- Experience with HW-SW co-verification and writing C/assembly level testcases preferred.
- Good communication and collaboration skills to work with global teams.
Education Requirements
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with 6+ years of relevant hardware engineering experience; OR Master's degree in a related field with 5+ years; OR PhD in a related field with 4+ years. The role targets senior-level candidates (typically 8+ years) for staff positions.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
