NPU Physical Design Engineer (Lead/Staff/Sr Staff)
QualcommJob Title
NPU Physical Design Engineer (Lead/Staff/Sr Staff)
Role Summary
Lead physical implementation and signoff for Qualcomm Hexagon NPU blocks. The role owns PNR execution from floorplanning through post-route and signoff, working within the Hardware Engineering team to meet performance, power, and timing targets on advanced process nodes.
Experience Level
Senior level. The posting expects experienced engineers (guidance: 7+ years of P&R/PNR experience on advanced nodes; minimum qualification pathways provided in Education Requirements).
Responsibilities
The core responsibilities focus on physical design and signoff for NPU blocks on advanced process nodes.
- Full ownership of PNR implementation: floorplanning, placement, CTS, optimization, and post-route activities.
- Execute and drive signoff flows including STA, power analysis, functional verification (FV), and low-power verification.
- Work with signoff domains and understand constraints such as LEC, CLP, and PDN considerations.
- Develop and maintain PNR and verification flows; debug closure issues and provide design optimizations.
- Collaborate with cross-functional teams (RTL, timing, power, verification) to meet silicon goals.
- Use scripting and EDA tools to automate flows and report results; support bring-up and yield activities as needed.
Requirements
Must-have technical skills and practical experience for immediate contribution.
- Extensive hands-on PNR experience in modern process nodes (examples: 4nm/5nm/7nm/10nm); typically 7+ years of relevant PNR experience.
- Proven experience with floorplanning, placement, CTS and post-route optimization.
- Signoff knowledge: static timing analysis (STA), power analysis, and common signoff verification flows.
- Practical knowledge of signoff domains and power delivery network (PDN) considerations.
- Strong Unix/Linux skills and scripting experience (Perl, Tcl or similar) to support automation and flow development.
- Analytical problem solving and the ability to debug complex timing/power issues.
- Nice-to-have: prior work on Hexagon or similar NPUs, experience with low-power verification techniques, familiarity with advanced EDA toolsets and LVS/DRC signoff interactions.
Education Requirements
Qualification options: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with 4+ years of hardware engineering experience; OR Master's degree in the same fields with 3+ years of experience; OR PhD in the same fields with 2+ years of experience. Equivalent practical experience is accepted as described in the qualification pathways.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
