New College Grad - Mixed Signal Design Engineer, HBM

Job Title

New College Grad - Mixed Signal Design Engineer, HBM

Role Summary

Join the Memory Systems Engineering team to design and integrate digital and mixed-signal subsystems for High Bandwidth Memory (HBM) base-die products. The role focuses on RTL development, interface specification, verification collaboration, and silicon validation support.

This position provides mentored, hands-on exposure to memory-system micro-architecture, SoC integration, verification practices, and post-silicon debug methods.

Experience Level

Entry-level (new college graduate). Suitable for recent Bachelor’s or Master’s degree holders or candidates with equivalent academic projects, internships, or research experience.

Responsibilities

Primary responsibilities include translating system requirements into RTL and supporting the path from design to silicon:

• Define and implement digital micro-architecture for HBM base-die subsystems (channel logic, boot/init sequencing, training orchestration, config/status registers, telemetry, performance monitoring, reliability features).
• Translate system requirements into timing, power, and area objectives; develop and maintain interface specifications for bus protocols, CDCs, clocks, and resets.
• Develop, integrate, and debug synthesizable SystemVerilog RTL including multi-channel logic, interrupts, register maps, scan infrastructure, and DFT interfaces.
• Collaborate with design verification teams to build verification strategies, reach coverage goals, and resolve RTL, testbench, and gate-level issues.
• Support silicon bring-up and post-silicon validation through debug enablement and root-cause analysis in partnership with DFT/test engineering.
• Leverage AI-assisted tools to improve productivity, debugging, and data-driven analysis.

Requirements

Must-have technical skills and experience:

• Experience with digital design, SoC integration, or semiconductor development via academic projects, internships, research, or industry experience.
• Practical knowledge of SystemVerilog RTL development and synthesizable coding practices.
• Familiarity with clock and reset architectures, CDC/RDC methodologies, and low-power design concepts.
• Understanding of design-for-debug and design-for-test principles and ability to collaborate across multi-functional engineering teams.
• Experience with or willingness to apply AI-assisted/AI-enabled tools in engineering workflows for debug and analysis.

Nice-to-have:

• Exposure to post-silicon validation, silicon bring-up, or structured hardware debug methodologies.
• Familiarity with scan, MBIST, LBIST, or related test/debug architectures.
• Experience contributing to verification planning and achieving functional/code coverage objectives.
• Knowledge of micro-architecture optimization, timing closure concepts, and design tradeoffs.
• Experience applying AI for data analysis, debug automation, or productivity enhancement in semiconductor design.

Education Requirements

Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or a related field is specified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.