Network Systems Architect

Job Title

Network Systems Architect

Role Summary

Design the scale-up network architecture and interfaces for Cerebras platforms, focusing on low-latency system fabrics and their boundaries with scale-out and customer-facing networks. Work cross-functionally with application, compiler, runtime, and systems teams to translate communication patterns and workload requirements into measurable fabric specifications.

Experience Level

Senior-level. Years of experience: not specified.

Responsibilities

Primary responsibilities include:

• Set the multi-generation architecture and roadmap for Cerebras scale-up networks and their interfaces to scale-out and customer-facing networks.
• Collaborate with application, compiler, runtime, and communication-library teams to derive required bandwidth, latency, ordering, availability, and serviceability from mapping and communication choices.
• Define fabric topology, protocols, and switch behavior, including routing, buffering, flow control, reliability, and fault containment; connect data-plane choices to end-to-end system behavior.
• Decide when to adopt standards-based or merchant silicon versus when a custom protocol, switch, link, or offload is justified.
• Use performance models, traffic simulation, prototypes, and lab data to validate architecture choices and set acceptance criteria.
• Write architecture and interface specifications, lead design reviews, and drive cross-layer decisions through implementation, bring-up, and qualification.

Requirements

Key qualifications and skills.

Must-have:

• Proven experience designing low-latency, scale-up system fabrics or high-performance interconnects.
• Hands-on background in implementation, modeling, bring-up, or debugging of networks or interconnects.
• Deep knowledge of protocols, routing, buffering, flow control, reliability, and fault containment.
• Experience with performance modeling, traffic simulation, prototyping, and using lab measurements to validate designs.
• Experience collaborating across software and hardware teams and producing architecture and interface specifications.

Nice-to-have:

• Experience with merchant silicon, standards-based networking, or custom switch/link design.
• Familiarity with accelerator interconnects or customer-facing network integration.

Education Requirements

Not specified.

About the Company

Company: Cerebras

Headquarters: Sunnyvale, CA, USA

Developer of wafer-scale AI accelerators, Cerebras designs the Wafer Scale Engine (WSE)-one of the world’s largest AI chips-to deliver high-speed training and inference solutions for model labs, enterprises, and AI-native startups.