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Mixed Signal Logic Design Engineer

Intel Corporation
August 11, 2026
Full-time
Remote friendly (Bengaluru, Karnataka, India)
Worldwide
RTL Design Jobs, Level - Mid-Career

Job Title

Mixed Signal Logic Design Engineer

Role Summary

Design and deliver RTL and microarchitecture for mixed-signal and high-speed IP blocks, focusing on low-power, performance and area optimization. Work within an SoC/IP team and coordinate with architecture, verification and system teams to integrate and qualify IP modules.

This role emphasizes RTL implementation, automation of front-end flows, power/performance analysis, and support for timing and coverage closure.

Experience Level

Mid-level. Typical experience: 4–12 years with a Bachelor's degree or 3–10 years with a Master's degree.

Responsibilities

Key responsibilities include design, analysis, automation and cross-team integration for mixed-signal IP logic.

  • Define and implement microarchitecture and RTL (SystemVerilog) for mixed-signal and high-speed IP blocks.
  • Collaborate with architecture and system teams to optimize power, performance and area.
  • Develop and maintain automation flows and perform front-end QA (Lint, CDC, synthesis checks).
  • Perform power and performance analysis; drive area and power efficiency improvements.
  • Review verification plans, troubleshoot and resolve RTL issues to ensure correctness.
  • Support SoC teams for integration and delivery of IP modules.
  • Implement automated solutions to streamline coverage closure and timing convergence.

Requirements

Must-have technical skills and tools; preferred items listed separately.

  • Must-have: RTL development expertise in SystemVerilog.
  • Must-have: Low-power design techniques (UPF, clock gating, multiple clock domains).
  • Must-have: Experience with front-end design and QA tools such as Spyglass, VC Lint, CDC analysis and synthesis tool flows.
  • Must-have: Simulation and debug experience (e.g., VCS, Verdi).
  • Must-have: Scripting for automation (Perl, Python, Tcl).
  • Must-have: Experience delivering IP for SoC integration.
  • Nice-to-have: Familiarity with DFI, DDR or LPDDR protocols and DDR PHY/memory controller design.
  • Nice-to-have: Pre-silicon and post-silicon validation experience and basic analog understanding to aid analog/digital integration.
  • Nice-to-have: Knowledge of area and power optimization techniques for IP designs.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a closely related technical field. Experience guidance provided in the posting: 4–12 years with a Bachelor's degree or 3–10 years with a Master's degree.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-08-11