Mixed Signal Logic Design Engineer

Job Title

Mixed Signal Logic Design Engineer

Role Summary

Design and deliver RTL and microarchitecture for high-speed, low-power DDR PHY IP within the Memory PHY Group. Work spans architecture definition, SystemVerilog RTL implementation, front-end quality checks, and automation of flows that improve IP delivery to validation, backend, and SoC teams.

Experience Level

Mid-level — requires 3+ years of relevant industry experience.

Responsibilities

Key responsibilities include ownership of logic design, quality assurance of RTL, and improving design delivery processes.

• Define architecture and microarchitecture for mixed-signal IP logic blocks.
• Implement and maintain RTL in SystemVerilog/Verilog.
• Set up and improve automation flows for IP logic design and delivery.
• Ensure RTL quality via front-end tool flows: lint, CDC, RDC, voltage-domain crossings, synthesis checks.
• Prepare front-end packages and collateral for IP milestones and SoC integration.
• Drive area and power optimizations and make technical trade-offs between analog and digital.
• Collaborate with validation, backend, and SoC teams; make critical technical decisions.
• Mentor junior engineers and support cross-functional execution.

Requirements

Concise list of must-have technical skills and additional preferred qualifications.

Must-have:

• Proficient RTL design and coding in SystemVerilog and Verilog.
• Expertise in mixed-signal fundamentals and low-power techniques (UPF, clock gating).
• Strong understanding of clock domain crossing and power-performance trade-offs.
• Experience with hardware simulation and debug tools (e.g., VCS, Verdi).
• Familiarity with IP environments, configuration management, and front-end tools for lint, CDC, RDC, voltage-domain crossings, and synthesis.

Preferred / Nice-to-have:

• Experience debugging complex logic, timing paths, and system-level validation.
• DDR domain knowledge (DFI/DDR/LPDDR protocols) and pre-/post-silicon validation exposure.
• Familiarity with formal property verification and Git-based workflows.
• Experience with automation, VSCode/GitHub Copilot or other AI-assisted development tools.

Education Requirements

BS or MS degree is stated; the posting specifies a BS or MS and 3+ years of relevant industry experience. Fields of study are not explicitly listed; a technical/engineering degree is implied.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.