Mixed-Signal IP Memory & Die-to-Die (D2D) System Engineer

Job Title

Mixed-Signal IP Memory & Die-to-Die (D2D) System Engineer

Role Summary

Contribute to the architecture, modelling, analysis, and validation of high-performance LPDDR, DDR, HBM, and Die-to-Die interconnect systems for advanced SoC platforms. Work across PHY, controller, package, silicon, and platform teams to define system requirements and deliver robust memory and interconnect solutions.

Experience Level

Hiring across multiple levels; minimum 2+ years of industry experience is required. The role typically suits early-career to mid-career engineers with growing technical ownership matched to experience.

Responsibilities

Primary responsibilities cover system architecture, modelling, signal and power integrity, silicon validation, and cross-functional collaboration.

• Develop and evaluate architectures for LPDDR, DDR, HBM, and Die-to-Die communication systems; define system requirements and specifications.
• Create behavioural and electrical models and simulation environments to evaluate timing margins, jitter, noise, power, and performance under realistic workloads.
• Perform signal integrity (SI) and power integrity (PI) analysis; assess channel characteristics, package effects, PDN behaviour, noise coupling, and jitter budgets.
• Support pre-silicon and post-silicon validation; correlate simulation results with silicon measurements and analyse characterization data.
• Work with analog, digital, firmware, package, product engineering, and validation teams; participate in design reviews and technical planning.

Requirements

Must-have technical skills and relevant industry experience. Preferred items noted.

• Minimum 2+ years industry experience in semiconductor, high-speed interfaces, memory systems, communications systems, or related fields.
• Experience in system architecture and modelling, signal integrity or power integrity analysis, memory subsystem development, or chip-to-chip interconnect technologies.
• Experience developing behavioural, architectural, or electrical models using MATLAB, Python, SystemC, Verilog-AMS, or similar tools.
• Knowledge of channel modelling, equalization techniques, jitter analysis, and timing-closure methodologies.
• Familiarity with package, board, and system-level design considerations and SPICE simulation tools.
• Understanding of DDR/LPDDR, HBM, UCIe, PCIe, or CXL is highly desirable.

Education Requirements

Minimum: Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, Science, or a related technical discipline. Preferred: Master's or Ph.D. in Electrical/Electronic/Computer Engineering, Physics, or related fields. Equivalent practical experience will be considered.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.