Mixed Signal Design Verification Engineer
Join Intel's Central Engineering Group (CEG) in Penang to deliver next-generation DDR PHY designs for SoC applications on advanced process nodes. The role is focused on mixed-signal validation and verification of PHY custom building blocks, working closely with designers to ensure functional and manufacturing readiness. This position is eligible for Intel's hybrid work model.
Entry-level (College graduate / new grad). Suitable for candidates with approximately 0β3 years of relevant experience.
The engineer will validate mixed-signal PHY building blocks and ensure they meet specifications.
Must-have technical and professional skills; formal education details are listed separately below.
Bachelor's or Master's degree in Electronics Engineering. Preferred focus: integrated circuit design or RTL design.
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
