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Mixed-Signal Design Verification Engineer

Texas Instruments
March 19, 2026
Full-time
On-site
Dallas, Texas, United States
Level - Senior

Role Summary

The Mixed-Signal Design Verification Engineer is responsible for verifying high-speed wireline communications and clock/data paths within the Top-Level Design Verification (TLDV) team. The role focuses on pre-silicon verification of complex mixed-signal IC products, ensuring functionality, performance, and reliability of chips in a collaborative environment.

Experience Level

Senior level, with a minimum of 8 years of experience required.

Responsibilities

Key responsibilities include:

  • Executing pre-silicon verification of complex mixed-signal IC products.
  • Building testbench and automation solutions for verifying DUT behavior before tapeout.
  • Verifying high-speed clock and data paths such as USB and SerDes protocols.
  • Collaborating with design and systems teams to guide Design for Verification architecture.
  • Creating and maintaining behavioral models of analog circuits.
  • Evaluating system-level use-cases and recreating them in simulation.

Requirements

The following qualifications are required:

  • 8+ years of experience as a Design Verification Engineer, including 4+ years in high-speed clock/data path verification.
  • Strong understanding of mixed-signal and digital verification flows.
  • Solid knowledge of analog and digital designs.
  • Experience in automation related to design and verification.
  • Excellent debugging skills with attention to detail.
  • Strong communication and collaboration skills.

Education Requirements

Bachelor's Degree required.


About the Company

Company: Texas Instruments

Headquarters: Dallas, Texas, USA

Texas Instruments is a global semiconductor company that designs, manufactures, and sells analog and embedded processing chips for various markets including industrial, automotive, and personal electronics. The company's innovations aim to make electronics more affordable and reliable, fostering advancements in technology through each generation of semiconductors.

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Date Posted: 2026-03-19