Mixed Signal Design Verification Engineer
Intel CorporationJob Title
Mixed Signal Design Verification Engineer
Role Summary
Verify and validate mixed-signal IP blocks and microarchitectures for ASIC/SoC projects. Work with digital and analog architects, RTL developers, physical design, and cross-functional teams to produce robust verification plans, testbenches, and debug failing designs in pre-silicon environments.
Experience Level
Mid-level. Typical experience: 4–12 years with a Bachelor's degree, or 3–10 years with a Master's degree in relevant fields.
Responsibilities
Primary responsibilities include planning and executing verification activities for mixed-signal designs and improving verification infrastructure.
- Develop and execute IP verification plans, testbenches, and verification environments for mixed-signal microarchitecture specifications.
- Perform functional verification including analog behavioral modeling and system simulations; analyze power and timing impacts.
- Debug failing tests in pre-silicon environments, perform root-cause analysis, and implement fixes.
- Collaborate with architects, RTL developers, and physical design teams to improve architectures and resolve issues.
- Lead technical reviews of test plans and validation results; document verification coverage and findings.
- Maintain and enhance verification methodologies, infrastructure, and tools to improve coverage and efficiency.
Requirements
Must-have technical skills and experience; preferred items noted separately.
- Strong expertise in SystemVerilog, UVM, and Verilog for mixed-signal verification.
- Experience with EDA simulators and tools such as Synopsys VCS, Cadence Xcelium/JasperGold, or Mentor Questa.
- Scripting proficiency in Python, Perl, or Tcl for testbench automation.
- Deep knowledge of memory and interface protocols (DDR4/DDR5/LP5/LP6) and standard protocols such as JTAG, IJTAG, CRI, APB.
- Experience with multi-clock-domain mixed-signal designs, constraint-random test generation, and complex debug workflows.
- Ability to analyze power and timing interactions in verification environments.
- Preferred: familiarity with low-power techniques (UPF, clock gating), Formal Property Verification tools, and version control systems (Git or Perforce).
- Preferred: strong collaboration and communication skills for multidisciplinary teams.
Education Requirements
Bachelor's or Master's degree in Electronics, VLSI Engineering, or a related technical field. The posting specifies 4–12 years' experience if holding a Bachelor's degree, or 3–10 years' experience if holding a Master's degree.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
