Memory Validation Architect

Job Title

Memory Validation Architect

Role Summary

Define and lead the validation architecture for memory subsystems (DDR5, LPDDR5/LPDDR6, HBM and emerging technologies) across multiple FPGA product families. Provide technical leadership from architecture definition through silicon bring-up, qualification, and customer deployment.

Drive scalable validation methodologies, automation, silicon characterization, complex debug, and cross-functional collaboration with architecture, RTL, firmware, board design, signal integrity, software, and memory vendors.

Experience Level

Senior-level. Typical candidates have a decade or more of experience in memory subsystem architecture, silicon validation, or high-speed interface development.

Responsibilities

Core responsibilities include defining validation strategy, executing silicon bring-up and qualification, and driving improvements across memory subsystems.

• Define end-to-end validation architecture and strategy for memory subsystems across multiple FPGA families.
• Plan and lead validation from architecture definition through silicon bring-up, product qualification, and customer deployment.
• Architect scalable validation frameworks, reusable infrastructure, and automation that support multiple product generations.
• Lead pre-silicon and post-silicon validation for DDR5, LPDDR5/LPDDR6, HBM, memory controllers, PHYs, and training/calibration algorithms.
• Develop validation methodologies for functional correctness, performance characterization, margining, reliability, stress testing, error injection, compliance, and interoperability.
• Establish silicon characterization approaches for voltage, temperature, frequency, process variation, and manufacturing margin analysis.
• Lead complex root-cause investigations spanning RTL, firmware, board design, signal integrity, package interactions, and system software.
• Collaborate with DRAM vendors and board/SI teams to ensure interoperability and optimize channel topology, routing, termination, and power delivery.
• Define customer validation strategies and drive rapid resolution of customer-reported issues.
• Mentor senior engineers and establish metrics/dashboards to measure validation coverage, product quality, and debug efficiency.

Requirements

Must-have technical experience and demonstrated leadership in memory validation and silicon bring-up.

• 10+ years hands-on experience designing, validating, debugging, or optimizing DDR memory technologies (DDR4/DDR5, LPDDR4/LPDDR5, HBM).
• 10+ years experience with at least four of: memory controller architecture, DDR PHY architecture, memory initialization and training, DDR calibration algorithms, JEDEC memory specifications, memory timing analysis and scheduling.
• 8+ years leading or contributing to silicon bring-up, silicon debug, characterization, validation, and production qualification for complex SoCs or memory subsystems.
• 8+ years performing board-level signal integrity (SI), power integrity (PI), timing analysis, or high-speed memory channel validation.
• 5+ years using high-speed laboratory validation equipment (oscilloscopes, protocol analyzers, logic analyzers, Bit Error Rate Testers, traffic generators) for validation and debug.
• 5+ years programming or automating validation, test, or debug solutions (Python, C/C++ or similar).
• 5+ years leading cross-functional technical projects involving architecture, RTL, firmware, silicon validation, software, or product engineering.

Preferred:

• Experience with FPGA or ASIC memory subsystem development and working with major DRAM vendors (Micron, Samsung, SK hynix).
• Expertise with HBM, CXL memory / Compute Express Link, PCIe, AXI/AMBA, or coherent interconnect architectures.
• Experience defining organization-wide validation methodologies, automation frameworks, and leading distributed engineering teams.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field with 15+ years of industry experience; OR Master's degree with 13+ years of related industry experience; OR Ph.D. with 10+ years of related industry experience. (Degrees in related technical fields or the specified equivalent industry experience are required per the minimum qualifications.)

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.