Memory Systems Performance & Workload Architect - DMTS/SMTS

Job Title

Memory Systems Performance & Workload Architect — DMTS/SMTS

Role Summary

Lead workload-driven memory architecture and performance strategy across mobile and server platforms. Translate real-world application behavior into benchmarking, models, product requirements, and ecosystem optimizations for DRAM, LPDDR, and HBM systems.

Experience Level

Senior-level — requires 15+ years of experience (posting specifies 15–24+ years).

Responsibilities

Key responsibilities include leading benchmarking, analysis, modeling, and cross-stack optimization to inform memory architecture and product decisions.

• Define and maintain benchmarking frameworks and representative workload suites for mobile and server scenarios.
• Characterize memory behavior: bandwidth, latency, QoS, tail latency, access patterns, NUMA behavior, cache interaction, and memory-level parallelism.
• Perform root-cause analysis using PMU counters, perf, eBPF, ftrace, ARM Streamline/VTune equivalents and identify system bottlenecks.
• Drive optimizations across kernel (NUMA, huge pages, memory policies), firmware/BIOS, memory controller scheduling, and application-level tuning.
• Lead system-level tradeoff analyses (performance, power, cost, scalability) and influence controller and memory hierarchy design.
• Develop performance modeling, analytical simulation, and trace-driven replay frameworks for what-if exploration and product targets.
• Partner with ecosystem teams to optimize AI frameworks, databases, virtualization platforms, and OS memory management.

Requirements

Must-have technical experience and skills. Preferred items noted separately.

• 15–24+ years in memory systems, performance engineering, or system architecture with demonstrated cross-functional leadership.
• Proven expertise in workload analysis and characterization at scale for server and mobile workloads.
• Strong programming and tooling skills: Python, C/C++, and system-level tooling and profiling (perf, eBPF, PMU-based profiling).
• Experience with benchmarking suites such as SPEC, MLPerf, STREAM and trace-driven testing.
• Ability to influence product and architecture decisions across silicon, controllers, firmware, OS, hyperscalers, and industry partners.
• Nice-to-have: experience with AI/ML workloads, databases and cloud-native systems (RocksDB, MySQL/Postgres, Redis/Memcached), and familiarity with ARM and x86 performance tooling.

Education Requirements

Bachelor’s degree in Computer Science, Electrical Engineering, or a related field (with 15+ years experience) OR Master’s degree (with 14+ years) OR PhD (with 12+ years). The posting also accepts equivalent practical experience where specified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.