Memory Designer

Job Title

Memory Designer

Role Summary

Design and implement low-power, high-performance, area- and power-efficient embedded memory circuits and architectures for Snapdragon SoC products. Work on Memory IP within the ASICs Engineering team to deliver memories used by CPU, GPU, modem and camera subsystems.

Position is based in San Diego, CA and involves cross-functional interaction with CAD and SoC teams.

Experience Level

Mid-level. The posting references ~5+ years of academic or professional experience designing embedded memories; typical range ~3–7 years depending on prior role and responsibilities.

Responsibilities

Key responsibilities include designing, verifying and delivering embedded memories for SoC use.

• Develop custom digital circuits for high-speed, low-power SRAM designs.
• Schematic capture and simulation of major blocks; margin verification and characterization.
• Plan and supervise layout; work on tight pitch-matched memory layouts.
• Coordinate with CAD team for full verification, timing closure, and model generation.
• Collaborate with SoC teams (CPU, GPU, Modem, etc.) to define memory PPA (power, performance, area) targets.

Requirements

Technical must-haves and preferred skills for successful candidates.

Must-have:

• Proven experience in embedded memory design for SoC applications (SRAM, register files, cache-related designs).
• Strong knowledge of high-performance and low-power circuit design techniques.
• Solid understanding of semiconductor device fundamentals and variation-aware design for advanced CMOS/FinFET nodes.
• Experience across the full embedded memory flow: architecture, circuit design, physical implementation, characterization, timing and model generation.
• Experience with layout planning and working on tight pitch/matched memory layouts.
• Ability to work with CAD/verification flows and to interface with SoC teams on PPA targets.

Nice-to-have:

• Experience specific to CPU L1/L2 cache, compiler SRAM/register-file architectures.
• Prior work on compiler automation for memory generation or memory compiler flows.

Education Requirements

The posting lists degree-based minimum qualifications: Bachelor's degree in Science, Engineering, or related field with 2+ years of ASIC design/verification/validation/integration experience; OR Master's degree in Science, Engineering, or related field with 1+ year of such experience; OR PhD in Science, Engineering, or related field. (The posting also separately references 5+ years of academic or professional experience designing embedded memories.)

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.