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Manager, Silicon Circuit Co-Design - Silicon Co-Design Group

NVIDIA
October 2, 2026
Full-time
On-site
Shanghai, SH, China
Device Engineering Jobs, Level - Senior

Job Title

Manager, Silicon Circuit Co-Design - Silicon Co-Design Group

Role Summary

Lead the Circuit Co-Design function within the Silicon Co-Design Group to close simulation-to-silicon gaps, ensure reliability and performance of critical silicon circuits, and drive production readiness across programs.

The role combines technical leadership, team building, and cross-functional coordination across circuit design, VLSI, PDN, firmware, reliability, and architecture teams.

Experience Level

Senior - typically requires 10+ years in silicon validation, circuit co-design, or post-silicon characterization, including at least 3 years leading technical teams.

Responsibilities

Manage a technical team and define the methods that ensure circuits meet reliability, noise, and performance targets in real silicon.

  • Lead a team of senior engineers across silicon bring-up, post-silicon validation, and circuit co-design for reliability, safety, and performance features.
  • Set technical direction: define characterization methods, close simulation-to-silicon gaps, quantify noise and dI/dt margins, analyze aging and reliability, and drive fixes to confirmation.
  • Make program-level technical decisions when reliability, noise, or power-integrity issues impact product readiness.
  • Hire, develop, and retain engineers with depth in circuit co-design, power integrity, noise characterization, reliability physics, and post-silicon validation.
  • Coordinate cross-functionally to convert technical intersections into decisions and actions.

Requirements

Must-have technical and leadership qualifications.

  • 10+ years in silicon validation, circuit co-design, or post-silicon characterization, with at least 3 years leading technical teams.
  • Deep circuit fundamentals (analog, digital, mixed-signal) and strong expertise in power integrity, noise analysis, dI/dt characterization, and reliability/aging mechanisms.
  • Hands-on experience with substrate and supply noise analysis, PDN design and mitigation, and diagnosing silicon reliability mechanisms.
  • Proven track record hiring, developing, and retaining strong engineering talent.
  • Ability to maintain technical depth while managing across multiple programs and stakeholders.
  • Nice-to-have: experience building or scaling a circuit co-design or reliability organization; personally resolving production-critical failures involving noise, dI/dt, aging, or power integrity; experience adopting AI-driven validation or co-design flows.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, or equivalent practical experience.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-09-30