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Manager/Director of Hardware Engineering

Baya Systems
August 27, 2026
Full-time
On-site
Santa Clara, California, United States
Semiconductor IP Jobs, Level - Senior

Job Title

Manager/Director of Hardware Engineering

Role Summary

Lead a first-level hardware engineering team responsible for microarchitecture, RTL design, and verification of high-speed interconnect IP. Own end-to-end delivery from specification through tape-out in a fast-paced startup environment.

Reports to the VP of Hardware Engineering; role is onsite in the Santa Clara office and requires close collaboration with architecture, physical design, and systems teams.

Experience Level

Senior-level role. Requires 8+ years of industry experience in ASIC/IP development with at least 2–3 years in a technical leadership or management role.

Responsibilities

Accountable for team leadership, execution, verification quality, and process improvements to meet tape-out milestones.

  • Directly manage, mentor, and grow a team of ~8–12 RTL microarchitects and design verification engineers.
  • Drive microarchitecture, RTL implementation, and integration of high-speed interconnect IP blocks toward tape-out.
  • Oversee development of coverage-driven verification plans, UVM/OVM environments, constrained-random testing, and emulation flows.
  • Collaborate with architecture, physical design, and system teams to balance power, performance, area (PPA), and timing requirements.
  • Define engineering metrics, standard methodologies, and agile project management practices to improve predictability and delivery.

Requirements

Key must-have technical skills and leadership experience for immediate contribution.

  • 8+ years in ASIC/IP development with demonstrated ownership of IP blocks and tape-out execution; 2–3 years in a technical management role.
  • Strong domain knowledge of high-speed protocols (PCIe, UCIe, CXL, Ethernet) and advanced SerDes technologies.
  • Proficiency in RTL design and flows: SystemVerilog, Verilog, and common EDA simulation/synthesis tools.
  • Deep understanding of modern verification methodologies (UVM/OVM), constrained-random testing, formal verification, and coverage-driven verification.
  • Experience driving cross-functional tradeoffs for PPA and timing, and integrating verification across emulation and silicon bring-up.
  • Proven ability to establish engineering metrics, processes, and to operate effectively in a fast-moving startup environment.

Education Requirements

B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related technical field.


About the Company

Company: Baya Systems

Headquarters: Santa Clara, CA, USA

Baya Systems is a fast-moving Series B startup focused on accelerating intelligent computing in the emerging chiplet era. They design and license disruptive intellectual property for semiconductor chips and provide software-driven solutions for single-die and multi-die systems. Their contributions aim to simplify the design process for complex System-on-Chip (SoC) and multi-chiplet systems across various markets such as data center, AI, and automotive.

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Date Posted: 2026-08-26