Lead STA Engineer

Job Title

Lead STA Engineer

Role Summary

Lead and execute static timing analysis (STA) for complex ASIC/SoC designs to achieve timing closure and meet performance targets. Lead a small team of STA engineers, develop STA methodology and flows, and collaborate with architects, RTL, physical design, DFT, and PD teams.

Experience Level

Senior - typically requires 7+ years of hands-on STA experience for ASIC/SoC designs.

Responsibilities

Primary responsibilities include STA implementation, timing signoff, and cross-functional coordination.

• Develop, validate, and maintain Synopsys Design Constraints (SDC) at block and full-chip levels, including false paths and multicycle paths.
• Perform exhaustive timing analysis across multiple corners and modes (MCMM) and PVT variations for timing signoff.
• Debug and resolve setup, hold, transition, and path-based violations.
• Drive timing closure through ECO generation and evaluation.
• Collaborate with RTL, physical design, DFT, and PD teams to align timing models and clocking architectures.
• Develop and automate STA flows and scripts using EDA tools; improve tool flows and automation.
• Lead and mentor a small team of STA engineers and coordinate multi-team timing activities.
• Perform IP-level synthesis as required to support timing closure.

Requirements

Must-have technical skills and experience; listed concisely.

• 7+ years of hands-on static timing analysis experience for complex ASIC/SoC designs.
• Experience developing multi-mode timing constraints and executing final timing signoff for advanced technology nodes.
• Proven track record leading STA efforts through multiple tape-outs.
• Expertise with industry-standard STA tools (e.g., Synopsys PrimeTime, Cadence Tempus).
• Strong understanding of digital design fundamentals, clocking architectures, and low-power techniques.
• In-depth knowledge and practical application of SDC constraints.
• Proficiency in scripting (Perl, Python, TCL) and automation of STA flows.
• Strong communication and collaboration skills for working in a global, cross-functional environment.
• Ability to lead a small team and coordinate with Architects, Front End, DFT, and PD teams.

Education Requirements

Master's degree or Bachelor's degree in Electronics / Electrical Engineering, Computer Engineering, or a related field.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.