Lead Software Engineer - Partitioning and Optimization Algorithms

Job Title

Lead Software Engineer - Partitioning and Optimization Algorithms

Role Summary

Lead development of features and algorithms for the Cadence Protium prototyping platform, with a primary focus on partitioning and optimization algorithms used in FPGA-based prototyping.

The role involves designing and implementing algorithms, coordinating specification and implementation with a geographically distributed engineering team, and working with technical support and customers to resolve implementation and usage issues.

Experience Level

Senior. See Education Requirements for stated minimum experience by degree; this is a senior individual contributor role expected to lead algorithm and feature development.

Responsibilities

Primary responsibilities include:

• Design, implement, and optimize partitioning and related algorithms for the Protium prototyping platform.
• Develop production-quality C++ code and associated tests for new features.
• Collaborate with a distributed engineering team to define implementation specifications and integrate work across regions.
• Work with technical support and key customers to diagnose and resolve implementation or usage issues.
• Document algorithm designs, implementation details, and usage guidance.

Requirements

Must-have technical skills and attributes:

• Strong programming skills in C++ (production code experience).
• Proficiency with at least one scripting language such as Python or Perl for tooling and automation.
• Solid knowledge of algorithms and data structures.
• Ability to communicate and coordinate effectively with distributed teams and with customers.

Nice-to-have:

• Experience with FPGA-based prototyping, hardware emulation, or EDA toolchains.
• Direct experience with partitioning, placement, or optimization algorithms in system prototyping contexts.

Education Requirements

Bachelors in Computer Science or Electrical Engineering with a minimum of 4 years of related experience; or Masters with a minimum of 2 years of related experience; or PhD with a minimum of 0 years of related experience. Coursework or strong background in Algorithms and Data Structures is specified.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.