Lead Software Engineer: Hardware Verification R&D

Job Title

Lead Software Engineer: Hardware Verification R&D

Role Summary

The Lead Software Engineer will join the R&D team responsible for the Cadence Hardware Job Scheduler product used with the Palladium emulation platform. The role focuses on product coding, validation, requirement analysis, and improving runtime and debugging features for large-scale hardware emulation.

Experience Level

Senior — typically requires 4+ years of related software engineering experience.

Responsibilities

Work as a technical lead on the Hardware Job Scheduler product, collaborating with engineering teams to deliver reliable software for large-scale hardware emulation.

• Design, implement, and maintain production-quality code to specifications.
• Perform feature development, validation, and requirement analysis for the scheduler product.
• Investigate, reproduce, and resolve bugs; recommend fixes under time constraints.
• Analyze designs to determine integration and coding activities within the product architecture.
• Profile and optimize performance of software components used in emulation workflows.
• Collaborate with cross-functional teams to support debugging, dynamic waveform dump, and other runtime features.
• Mentor and coordinate with other engineers as needed.

Requirements

Must-have technical skills and abilities for this role.

• Strong Python programming skills.
• Experience with Linux operating systems.
• Familiarity with version control systems such as Git and Perforce.
• Experience with performance profiling tools (e.g., py-spy or similar).
• Scripting experience (bash, Tcl).
• Analytical problem-solving skills and willingness to learn.
• Effective verbal and written communication in English and Portuguese.
• Good interpersonal and teamwork skills.

Nice-to-have:

• Experience with DRM or job-scheduling tools (LSF, NC, SLURM).
• Advanced development experience in C++, distributed systems, or multithreading.
• Service and REST API development; web front-end development.
• Background with Verilog or VHDL.

Education Requirements

Posting specifies a completed Bachelor's degree in Computer Science or Electrical Engineering (with a minimum of 4 years related experience) or an ongoing/completed Master's or PhD (with a minimum of 2 years related experience).

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.