Lead RTL Design Engineer
SynopsysJob Title
Lead RTL Design Engineer
Role Summary
The Lead RTL Design Engineer will be involved in ASIC Digital Design activities. This role focuses on the development and implementation of RTL designs, leveraging expertise to contribute to engineering projects.
Experience Level
Mid-level
Responsibilities
Key responsibilities include:
- Design and develop RTL for ASIC products.
- Collaborate with cross-functional teams throughout the design process.
- Perform debugging and verification of designs.
- Optimize and refine designs to meet project requirements.
- Provide technical leadership and mentorship to junior engineers.
Requirements
Must-have qualifications include:
- Bachelor's or Master’s degree in Electrical Engineering or a related field.
- Strong experience with RTL design methodologies.
- Proficiency in hardware description languages such as Verilog or VHDL.
- Experience with ASIC design and verification tools.
- Ability to work collaboratively in a team environment.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering or a related field.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
