Lead RF Layout Designer

Job Title

Lead RF Layout Designer

Role Summary

Lead physical implementation of high-performance RF/analog integrated circuits, test structures, and PDK enablement. Collaborate with circuit designers, device and process engineers to produce manufacturable layouts that meet performance, yield, and reliability targets. Serve as a technical leader and mentor on small teams and projects.

Experience Level

Senior / Lead role. Typical experience guidance is provided in the Education Requirements section (PhD ~8+ years; Master’s ~10+ years; Bachelor’s ~12–15 years).

Responsibilities

Primary responsibilities include layout leadership, delivery of qualification tapeouts, automation, and cross-functional enablement.

• Lead layout design and physical implementation for RF/analog circuits and test structures.
• Deliver qualification test chips and tapeouts on schedule while meeting quality and cost targets.
• Collaborate with device, process, and circuit teams to define and validate design rules and methodologies.
• Support new technology node enablement, stack development, and layout guideline creation.
• Develop and maintain automation scripts (e.g., SKILL) to improve design efficiency.
• Optimize layouts for performance, area, and manufacturability per foundry rules.
• Provide feedback to improve PDK quality, design rules, and layout productivity.
• Lead small teams or projects and mentor junior engineers to improve technical capability.
• Perform work in accordance with Environmental, Health, Safety & Security (EHS&S) requirements.

Requirements

Must-have technical skills and experience; formal education expectations are summarized in the Education Requirements section below.

• Strong expertise in RF/analog layout design using CMOS technologies.
• Hands-on experience with Cadence Virtuoso and SKILL programming.
• Deep understanding of foundry design rules and layout optimization techniques.
• Proven track record delivering complex layouts and test chip tapeouts.
• Ability to independently solve complex, non-recurring technical problems.
• Demonstrated experience working effectively in cross-functional environments.
• Nice-to-have: experience in advanced-node technology development and RF communication applications.
• Nice-to-have: exposure to PDK development and design-rule definition; contributions to patents or technical publications.

Education Requirements

Bachelor's degree in Electrical Engineering or a related technical field (typical hiring profile lists 12–15 years of experience); Master's degree with ~10+ years of experience; PhD with ~8+ years of experience. The posting specifies degrees in Electrical Engineering or related fields as the expected academic background.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.