Lead Product Engineer

Job Title

Lead Product Engineer

Role Summary

Senior engineer responsible for high-performance, power‑critical CPU and/or GPU implementation and methodology. Work spans full‑chip and block‑level implementation from RTL to signoff and driving methodology, automation, and PPA improvements.

California salary range: $119,000–$221,000 plus potential bonus, equity, and benefits.

Experience Level

Senior-level (Lead).

Responsibilities

Deliver implementation, optimization, and methodology for high-performance CPU/GPU designs and collaborate with cross-functional teams.

• Lead full-chip and block-level implementation from RTL to signoff, including place-and-route, timing closure, physical verification, power analysis, and optimization.
• Drive floorplanning, placement, CTS, routing, timing analysis, signal integrity, IR drop, and electromigration work.
• Implement and refine timing-closure methodologies for setup, hold, power, and area optimization.
• Apply low-power implementation techniques (UPF/CPF, power gating, multi-voltage designs, clock gating, leakage optimization).
• Develop automation, scripts, and utilities to improve productivity and design quality.
• Work with architecture, RTL, verification, methodology, and CAD teams to resolve complex design issues.

Requirements

Must-have technical skills and experience required to perform the role; nice-to-have items that strengthen candidacy are listed separately.

• Must-have: Proven experience with full-chip and block-level implementation (RTL-to-signoff) and practical knowledge of place-and-route, timing closure, physical verification, and power analysis.
• Must-have: Strong understanding of physical design fundamentals: floorplanning, placement, CTS, routing, timing analysis, signal integrity, IR drop, and electromigration.
• Must-have: Experience with timing closure methodologies for setup, hold, power, and area optimization.
• Must-have: Familiarity with low-power implementation techniques (UPF/CPF, power gating, multi-voltage, clock gating).
• Must-have: Automation and scripting capability to develop tools and flows (examples: Python, Tcl, Perl, Shell).
• Must-have: Strong debugging and problem-solving skills and effective communication with cross-functional teams.
• Nice-to-have: Exposure to machine learning / AI-assisted optimization techniques and data-analytics or design-space exploration frameworks.
• Nice-to-have: Experience with advanced process nodes (5nm and below) and large-scale CPU/GPU implementation, PPA optimization, benchmarking, and methodology development.

Education Requirements

Not specified.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.