Lead Physical Design Engineer

Job Title

Lead Physical Design Engineer

Role Summary

Lead end-to-end physical implementation of complex ASIC/SoC designs — floorplanning, placement, clock tree synthesis, routing and sign-off — collaborating with RTL, verification, DFT and process teams to optimise performance, power and area and ensure manufacturability. Opportunity for full-chip ownership and to drive physical-aware RTL and constraints.

Experience Level

Senior / Principal level. Targeted experience: 10+ years in physical design for advanced technology nodes.

Responsibilities

Key responsibilities include:

• Lead floorplanning, placement, clock tree synthesis (CTS), routing and sign-off; potential full-chip execution.
• Perform synthesis, static timing analysis (STA) and timing closure to meet PPA targets.
• Plan and analyse power (IR drop, electromigration) and implement low-power techniques and multi-power domains.
• Ensure DRC, LVS and other physical verification compliance; support sign-off flows.
• Integrate design-for-test (DFT) structures and collaborate with test engineers.
• Develop and maintain physical design flows and automation in EDA tools.
• Interface with foundries and process engineers to optimise manufacturability and yield.
• Work with RTL and architecture teams on constraints, feasibility and physical-aware RTL changes.
• Leverage scripting and advanced AI tools to improve productivity, analysis and design quality.

Requirements

Must-have skills and experience:

• 10+ years of physical design experience at advanced nodes (7nm, 5nm or below).
• Proven expertise in place & route, STA, timing closure and sign-off flows.
• Power planning and IR/EM analysis experience; familiarity with low-power methodologies and multi-power domain architectures.
• Experience with physical verification flows (DRC/LVS) and sign-off tools.
• Proficiency with EDA tools such as Cadence Innovus, Synopsys Fusion Compiler, Mentor Graphics Calibre, or equivalents.
• Strong scripting/automation skills (TCL, Perl, Python) and ability to develop flows.
• Experience collaborating with RTL, DFT and foundry/process teams; strong problem-solving and communication skills.
• Nice-to-have: experience with AI accelerators, high-performance computing or networking chips; experience applying AI tools within engineering workflows.
• Note: some roles may require eligibility checks for export control compliance.

Education Requirements

Bachelor's, Master's or PhD in Electrical Engineering, Computer Engineering, or a related field.

About the Company

Company: Fractile

Headquarters: London, UK

Fractile is on a mission to revolutionize AI by developing silicon, systems, and software that enable the fastest execution of advanced models at lower costs. Established in 2022, the company has rapidly expanded, fostering a collaborative culture in its London and Bristol offices. With a focus on innovation in ML/AI IC product development, Fractile combines hardware and software to deliver high-impact solutions for data center applications.