Role Overview
The Lead Member of Technical Staff at Siemens EDA will focus on developing verification environments utilizing established methodologies on various protocols such as PCIe and SAS. The role entails extensive verification activities at the IP level to ensure full functional and code coverage through innovative approaches and methodologies.
Position Summary
This position entails developing and prototyping verification flows, integrating different verification tools, and automating methodology suites. It requires collaborating with internal teams and possibly interfacing with customers, including potential travel to client locations.
Experience Level
The ideal candidate will have 5 to 8 years of experience in Electronic Design Automation, specifically in IP and SOC level verification, paired with relevant educational qualifications in Electronics or related fields.
Key Responsibilities
- Develop verification environments for standard protocols like PCIe/SAS/SATA.
- Perform IP level verification to guarantee 100% Functional and Code Coverage.
- Prototype and suggest new verification flows using Veloce technology.
- Integrate and qualify various VTLs with Questa Based Verification IPs.
- Develop methodology suites and implement automation solutions.
- May require customer interface and occasional travel to client sites.
Essential Requirements
- Proficient in protocols such as AMBA, PCI/PCIe, SAS, Ethernet, or MIPI.
- B.Tech/M.Tech in ECE, EE, VLSI with 5-8 years of relevant experience.
- Experience with verification methodologies including Specman, System Verilog, UVM, OVM, and co-simulation techniques.
- Good communication skills for external collaboration.
- FPGA/Emulation expertise is highly beneficial.
- Strong scripting and automation capabilities are a significant plus.