Lead IP/Soc Verification Engineer

Role Overview

The Lead IP/Soc Verification Engineer will focus on the verification of features for AMD’s graphics processor IP. This role is crucial in ensuring that the final designs are free of bugs and meet all specified requirements.

Position Summary

In this role, verification planning and execution will be performed for both new and existing features of the graphics processor. The position requires collaboration with various engineering teams to ensure comprehensive test plans and workflows are in place. The engineer should be adept at analyzing and solving complex verification problems.

Experience Level

This position is targeted for mid-career professionals with substantial experience in ASIC verification and a strong foundation in processor architecture.

Key Responsibilities

• Work with hardware, firmware, and architecture teams to understand and verify new feature requirements.
• Create detailed test plans that address the design's different components and their interactions.
• Estimate and manage time for test creation and environment modifications.
• Develop and execute both directed and random tests for verification.
• Diagnose test failures, determining root causes and collaborating with engineers to fix issues.
• Analyze functional and code coverage metrics, adapting tests as necessary to meet requirements.

Qualifications and Skills

Applicants should possess a deep understanding of IP level ASIC verification, alongside proficiency in debugging and verification methodologies. The ideal candidate is also experienced with tools and languages such as UVM, Verilog, System Verilog, C, and C++.

Education Requirements

A Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering is required for this position.