Lead I/O Design Engineer

Job Title

Lead I/O Design Engineer

Role Summary

Lead design and delivery of custom I/O circuits and support circuitry for mixed-signal SoCs. Collaborate with system, package, reliability, physical design, and product teams to take I/O IP from specification through silicon bring-up and production ramp.

Experience Level

Senior-level. Typical experience: 5–8 years in Analog/Mixed-Signal or I/O circuit design.

Responsibilities

Primary responsibilities include:

• Design and develop custom I/O circuits: GPIO, LVDS, LVCMOS, SSTL, HSTL, DDR interfaces, and high-speed SerDes support circuits.
• Perform transistor-level design and SPICE simulations using advanced CMOS technology nodes.
• Develop and optimize ESD protection, level shifters, input buffers, output drivers, and on-chip termination circuits.
• Run pre-layout and post-layout simulations for functionality, timing, power, noise, and reliability.
• Perform signal integrity analysis: IBIS model generation, package-aware simulations, crosstalk and reflection analysis.
• Drive layout reviews and coordinate with physical design teams to meet design quality and performance targets.
• Support silicon bring-up, characterization, debugging, and production ramp activities.
• Produce and maintain design documentation, specifications, and verification reports.

Requirements

Must-have technical skills and experience:

• 5–8 years' experience in Analog/Mixed-Signal or I/O circuit design.
• Deep understanding of CMOS device physics and analog circuit design fundamentals.
• Practical knowledge of I/O architectures, standards, and ESD design methodologies.
• Hands-on custom circuit design experience with Cadence Virtuoso.
• Expertise with SPICE-based simulators (Spectre, HSPICE, FineSim).
• Familiarity with LVS, DRC, EMIR, reliability checks, process corners, Monte Carlo analysis, and yield optimization techniques.
• Experience with advanced technology nodes (16nm/7nm/5nm preferred).
• Strong analytical and debugging skills, and the ability to lead technical discussions and mentor junior engineers.

Preferred / nice-to-have:

• Experience with DDR4/DDR5, LPDDR, USB, PCIe, MIPI, or Ethernet interfaces.
• Package modeling and SI/PI analysis tool experience; IBIS and IBIS-AMI model generation.
• Silicon validation and lab characterization experience.
• Scripting skills in Python, Perl, Tcl, or SKILL.
• Exposure to automotive, AI/ML, networking, mobile, or data center SoCs; familiarity with functional safety and reliability requirements.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Microelectronics, or a related technical field.

About the Company

Company: NXP Semiconductors

Headquarters: Nijmegen, Netherlands

NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.