Silicon Labs logo

Lead Engineer - Design Verification (Low power UPF/CPF)

Silicon Labs
August 09, 2026
Full-time
On-site
Hyderabad, Telangana, India
Verification Jobs, Level - Senior

Job Title

Lead Engineer - Design Verification (Low power UPF/CPF)

Role Summary

Lead verification of low-power SoC designs with a focus on validating power intent and low-power features using UPF/CPF methodologies. Work within the Design Verification team and closely with RTL, architecture, and physical design teams to ensure robust, power-efficient silicon.

Experience Level

Senior level. The role targets experienced verification engineers with roughly 6–8 years of relevant design verification experience.

Responsibilities

Primary responsibilities include validating power intent, building verification infrastructure, and driving coverage closure for low-power features.

  • Verify power domains and power intent using UPF/CPF methodologies.
  • Develop and execute test plans for low-power modes and states.
  • Own end-to-end DV activities: testbench development, testcases, assertions, and RTL/UPF debugging.
  • Drive functional and assertion coverage closure.
  • Build and enhance SystemVerilog/UVM verification environments.
  • Perform power-aware verification and debug complex low-power interactions.
  • Collaborate with cross-functional teams (RTL, architecture, physical design) to resolve issues and improve methodologies.

Requirements

Must-have skills and experience for successful performance in this role.

  • 6–8 years of experience in design verification (SoC/ASIC focus).
  • Strong SystemVerilog and UVM experience.
  • Experience with assertion-based and coverage-driven verification.
  • Solid understanding of low-power design techniques and low-power SoC constructs (clock gating, isolation, level shifters, retention).
  • Experience with UPF/CPF-based verification and power-aware debug.
  • Strong debugging and problem-solving skills.

Nice-to-have:

  • Experience with formal/static verification.
  • Familiarity with Synopsys NLP tools and GLS / PA-GLS knowledge.
  • Scripting skills (Python, Perl).
  • Experience with ASIC tool flows and related CAD tools.
  • Familiarity with AI-powered productivity tools for analysis and verification workflows.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field (as listed in the minimum qualifications).


About the Company

Company: Silicon Labs

Headquarters: Austin, Texas, USA

Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.

Silicon Labs logo

Date Posted: 2026-08-08