Lead Design Verification Engineer – High‑Speed Interface Protocols

Job Title

Lead Design Verification Engineer – High‑Speed Interface Protocols

Role Summary

Lead subsystem and IP-level functional verification for high-speed interface protocol blocks in AI SoCs. Manage and mentor a verification team and coordinate with RTL design, SoC architecture, firmware, and other verification groups to deliver sign‑off‑quality designs.

Hands-on leadership role requiring deep protocol expertise, practical verification experience, and cross-functional problem resolution. Hybrid role based in Barcelona with an on-site-first cadence.

Experience Level

Senior - lead-level role. The team expects 10+ years of ASIC/SoC design verification experience with recent focus on high‑speed protocols.

Responsibilities

Primary responsibilities include architecting verification environments, driving sign‑off flows, and coordinating cross-functional closure of issues.

• Architect, implement, and debug functional verification environments at IP and subsystem levels.
• Act as protocol expert for AMBA and high‑speed interfaces (PCIe, UCIe, SerDes, etc.).
• Debug mismatches between RTL, DV models, and specifications; ensure compliance and correctness.
• Develop and maintain UVM-based testbenches, scripts, and automated flows.
• Triage simulation failures, track bugs, and drive closure with RTL, firmware, and architecture teams.
• Optimize simulation runtime, capacity, and compile turnaround for large designs.
• Maintain documentation of methodologies, flows, and known issues.

Requirements

Must-have technical skills and proven experience to perform the role.

• 10+ years of ASIC/SoC design verification experience with recent focus on high‑speed protocols (PCIe, UCIe, SerDes).
• Deep expertise in on-chip bus protocols (AXI, CXS, AHB, CHI, etc.).
• Proven experience developing UVM-based testbenches and driving coverage-driven sign‑off flows.
• Proficiency in Verilog/SystemVerilog and commercial simulators (VCS, Xcelium, Questa).
• Strong digital design fundamentals and understanding of SoC microarchitectures.
• Exceptional debugging and problem‑solving skills; able to work independently on complex issues.

Nice-to-have:

• Experience using AI-assisted tools for verification and regression analysis.
• Familiarity with Git or Perforce and job schedulers (LSF, Grid Engine).
• Scripting skills in Python, Perl, or TCL for automation and debug.
• Strong communication and documentation skills.

Education Requirements

Bachelor's or Master's degree in Electrical or Computer Engineering or a related field (specified in source). (If you have equivalent practical experience, that may also be acceptable; source lists degrees explicitly.)

About the Company

Company: Semidynamics

Headquarters: Barcelona, Spain

Semidynamics is a company specializing in infrastructure verification and automation solutions. They focus on optimizing resources and enhancing continuous integration processes in design verification. The team collaborates to maintain regression test infrastructure and develop efficient workflows.